1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
|
/* Copyright 2020 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Silicon Mitus SM5803 Buck-Boost Charger
*/
#ifndef __CROS_EC_SM5803_H
#define __CROS_EC_SM5803_H
/* Note: configure charger struct with CHARGER_FLAGS */
#define SM5803_ADDR_MAIN_FLAGS 0x30
#define SM5803_ADDR_MEAS_FLAGS 0x31
#define SM5803_ADDR_CHARGER_FLAGS 0x32
/* Main registers (address 0x30) */
#define SM5803_REG_STATUS1 0x01
#define SM5803_STATUS1_VSYS_OK BIT(0)
#define SM5803_STATUS1_VPWR_OK BIT(1)
#define SM5803_STATUS1_VBUS_UVL BIT(3)
#define SM5803_STATUS1_VBUS_SHORT BIT(4)
#define SM5803_STATUS1_VBUS_OVH BIT(5)
#define SM5803_STATUS1_CHG_DET BIT(6)
#define SM5803_STATUS1_BAT_DET BIT(7)
#define SM5803_REG_STATUS2 0x02
#define SM5803_STATUS2_BAT_DET_FG BIT(1)
#define SM5803_STATUS2_VBAT_SHORT BIT(0)
#define SM5803_REG_INT1_REQ 0x05
#define SM5803_REG_INT1_EN 0x0A
#define SM5803_INT1_VBUS_PWR_HWSAFE_LIMIT BIT(0)
#define SM5803_INT1_CHG BIT(2)
#define SM5803_INT1_BAT BIT(3)
#define SM5803_INT1_CLS_OC BIT(4)
#define SM5803_INT1_SLV_DET BIT(5)
#define SM5803_INT1_SWL_DISCH BIT(6)
#define SM5803_INT1_PREREG BIT(7)
#define SM5803_REG_INT2_REQ 0x06
#define SM5803_REG_INT2_EN 0x0B
#define SM5803_INT2_VBATSNSP BIT(0)
#define SM5803_INT2_IBAT_DISCHG BIT(1)
#define SM5803_INT2_IBAT_CHG BIT(2)
#define SM5803_INT2_IBUS BIT(3)
#define SM5803_INT2_VBUS BIT(4)
#define SM5803_INT2_VCHGPWR BIT(5)
#define SM5803_INT2_VSYS BIT(6)
#define SM5803_INT2_TINT BIT(7)
#define SM5803_REG_INT3_REQ 0x07
#define SM5803_REG_INT3_EN 0x0C
#define SM5803_INT3_GPADC0 BIT(0)
#define SM5803_INT3_VBATC1 BIT(1)
#define SM5803_INT3_VBATC2 BIT(2)
#define SM5803_INT3_SPARE BIT(3)
#define SM5803_INT3_VBUS_PWR_LIMIT BIT(4)
#define SM5803_INT3_IBAT BIT(5)
#define SM5803_REG_INT4_REQ 0x08
#define SM5803_REG_INT4_EN 0x0D
#define SM5803_INT4_CHG_FAIL BIT(0)
#define SM5803_INT4_CHG_DONE BIT(1)
#define SM5803_INT4_CHG_START BIT(2)
#define SM5803_INT4_SLP_EXIT BIT(3)
#define SM5803_INT4_OTG_FAIL BIT(4)
#define SM5803_INT4_CHG_ILIM BIT(5)
#define SM5803_INT4_IBAT_CC BIT(6)
#define SM5803_INT4_CC BIT(7)
#define SM5803_REG_MISC_CONFIG 0x15
#define SM5803_MISC_INV_INT BIT(0)
#define SM5803_INT_CLEAR_MODE BIT(1)
#define SM5803_INT_MASK_MODE BIT(2)
#define SM5803_REG_REFERENCE 0x20
#define SM5803_REFERENCE_LDO3P3_PGOOD BIT(4)
#define SM5803_REFERENCE_LDO5_PGOOD BIT(5)
#define SM5803_REG_GPIO0_CTRL 0x30
#define SM5803_GPIO0_VAL BIT(0)
#define SM5803_GPIO0_MODE_MASK GENMASK(2, 1)
#define SM5803_GPIO0_OPEN_DRAIN_EN BIT(6)
#define SM5803_CHG_DET_OPEN_DRAIN_EN BIT(7)
enum sm5803_gpio0_modes {
GPIO0_MODE_PROCHOT,
GPIO0_MODE_OUTPUT,
GPIO0_MODE_INPUT
};
#define SM5803_REG_PORTS_CTRL 0x40
#define SM5803_PORTS_VBUS_DISCH BIT(0)
#define SM5803_PORTS_VBUS_PULLDOWN BIT(1)
#define SM5803_PORTS_VBUS_SNS_DISCH BIT(2)
#define SM5803_PORTS_VBUS_SNS_PULLDOWN BIT(3)
/* ADC Registers (address 0x31) */
/*
* Note: Some register bits must be enabled for the DC-DC converter to properly
* handle transitions.
*/
#define SM5803_REG_GPADC_CONFIG1 0x01
#define SM5803_GPADCC1_VBATSNSP_EN BIT(0)
#define SM5803_GPADCC1_IBAT_DIS_EN BIT(1)
#define SM5803_GPADCC1_IBAT_CHG_EN BIT(2)
#define SM5803_GPADCC1_IBUS_EN BIT(3)
#define SM5803_GPADCC1_VBUS_EN BIT(4)
#define SM5803_GPADCC1_VCHGPWR_EN BIT(5) /* NOTE: DO NOT CLEAR */
#define SM5803_GPADCC1_VSYS_EN BIT(6) /* NOTE: DO NOT CLEAR */
#define SM5803_GPADCC1_TINT_EN BIT(7)
/* Note: Threshold registers all assume lower 2 bits are 0 */
#define SM5803_REG_VBUS_LOW_TH 0x1B
#define SM5803_REG_VBUS_HIGH_TH 0x2B
#define SM5803_REG_TINT_LOW_TH 0x1D
#define SM5803_REG_TINT_HIGH_TH 0x2D
/*
* Vbus levels increment in 23.4 mV, set thresholds to below 3.5V and above 4.0V
* to mirror what TCPCI uses for Vbus present indication
*/
#define SM5803_VBUS_LOW_LEVEL 0x25
#define SM5803_VBUS_HIGH_LEVEL 0x2C
/*
* TINT thresholds. TINT steps are in 0.43 K with the upper threshold set to
* 360 K and lower threshold to de-assert PROCHOT at 330 K.
*/
#define SM5803_TINT_LOW_LEVEL 0xBF
#define SM5803_TINT_HIGH_LEVEL 0xD1
#define SM5803_REG_VBUS_MEAS_MSB 0x48
#define SM5803_REG_VBUS_MEAS_LSB 0x49
#define SM5803_VBUS_MEAS_LSB GENMASK(1, 0)
#define SM5803_VBUS_MEAS_BAT_DET BIT(2)
#define SM5803_VBUS_MEAS_VBUS_SHORT BIT(4)
#define SM5803_VBUS_MEAS_OV_TEMP BIT(5)
#define SM5803_VBUS_MEAS_CHG_DET BIT(6)
#define SM5803_REG_TINT_MEAS_MSB 0x4E
/* Charger registers (address 0x32) */
#define SM5803_REG_FLOW1 0x1C
#define SM5803_FLOW1_CHG_EN BIT(0)
#define SM5803_FLOW1_VBUSIN_DISCHG_EN BIT(1)
#define SM5803_FLOW1_DIRECTCHG_SRC_EN BIT(2)
#define SM5803_FLOW1_USB_SUSP BIT(7)
#define SM5803_REG_FLOW2 0x1D
#define SM5803_FLOW2_AUTO_TRKL_EN BIT(0)
#define SM5803_FLOW2_AUTO_PRECHG_EN BIT(1)
#define SM5803_FLOW2_AUTO_FASTCHG_EN BIT(2)
#define SM5803_FLOW2_AUTO_ENABLED GENMASK(2, 0)
#define SM5803_FLOW2_FW_TRKL_CMD BIT(3)
#define SM5803_FLOW2_FW_PRECHG_CMD BIT(4)
#define SM5803_FLOW2_FW_FASTCHG_CMD BIT(5)
#define SM5803_FLOW2_HOST_MODE_EN BIT(6)
#define SM5803_FLOW2_AUTO_CHGEN_SET BIT(7)
#define SM5803_REG_FLOW3 0x1E
#define SM5803_FLOW3_SWITCH_BCK_BST BIT(0)
#define SM5803_FLOW3_FW_SWITCH_RESUME BIT(1)
#define SM5803_FLOW3_FW_SWITCH_PAUSE BIT(2)
#define SM5803_FLOW3_SOFT_DISABLE_EN BIT(3)
#define SM5803_REG_ANA_EN1 0x21
#define SM5803_ANA_EN1_CLS_DISABLE BIT(7)
/*
* Input current limit is CHG_ILIM_RAW *100 mA
*/
#define SM5803_REG_CHG_ILIM 0x24
#define SM5803_CHG_ILIM_RAW GENMASK(4, 0)
#define SM5803_CURRENT_STEP 100
#define SM5803_REG_TO_CURRENT(r) (r * SM5803_CURRENT_STEP)
#define SM5803_CURRENT_TO_REG(c) (c / SM5803_CURRENT_STEP)
/*
* Output voltage uses the same equation as Vsys
* Lower saturation value is 3 V, upper 20.5 V
*/
#define SM5803_REG_VPWR_MSB 0x30
#define SM5803_REG_DISCH_CONF2 0x31
#define SM5803_DISCH_CONF5_VPWR_LSB GENMASK(2, 0)
/*
* Output current limit is CLS_LIMIT * 50 mA and saturates to 3.2 A
*/
#define SM5803_REG_DISCH_CONF5 0x34
#define SM5803_DISCH_CONF5_CLS_LIMIT GENMASK(6, 0)
#define SM5803_CLS_CURRENT_STEP 50
/*
* Vsys is 11 bits, with the lower 3 bits in the LSB register.
* The pre-regulation value is 2.72 V + Vsys_prereg * 10 mV
* Lower saturation value is 3V, upper is 20V
*/
#define SM5803_REG_VSYS_PREREG_MSB 0x36
#define SM5803_REG_VSYS_PREREG_LSB 0x37
#define SM5803_VOLTAGE_STEP 10
#define SM5803_VOLTAGE_SHIFT 2720
#define SM5803_REG_TO_VOLTAGE(r) (SM5803_VOLTAGE_SHIFT + \
r * SM5803_VOLTAGE_STEP)
#define SM5803_VOLTAGE_TO_REG(v) ((v - SM5803_VOLTAGE_SHIFT) \
/ SM5803_VOLTAGE_STEP)
/*
* Vbat for fast charge uses the same equation as Vsys
* Lower saturation value is 3V, upper is dependent on number of cells
*/
#define SM5803_REG_VBAT_FAST_MSB 0x3A
#define SM5803_REG_VBAT_FAST_LSB 0x3B
/*
* Fast charge current limit is ICHG_FAST * 100 mA
* Value read back may be adjusted if tempearture limits are exceeded
*/
#define SM5803_REG_FAST_CONF4 0x3C
#define SM5803_CONF4_ICHG_FAST GENMASK(5, 0)
#define CHARGER_NAME "sm5803"
#define CHARGE_V_MAX 20000
#define CHARGE_V_MIN SM5803_VOLTAGE_SHIFT
#define CHARGE_V_STEP SM5803_VOLTAGE_STEP
#define CHARGE_I_MAX 6300
#define CHARGE_I_MIN 0
#define CHARGE_I_STEP SM5803_CURRENT_STEP
#define INPUT_I_MAX 3100
#define INPUT_I_MIN 0
#define INPUT_I_STEP SM5803_CURRENT_STEP
/* Expose functions to control charger's GPIO and CHG_DET configuration */
enum ec_error_list sm5803_configure_gpio0(int chgnum,
enum sm5803_gpio0_modes mode, int od);
enum ec_error_list sm5803_set_gpio0_level(int chgnum, int level);
enum ec_error_list sm5803_configure_chg_det_od(int chgnum, int enable);
enum ec_error_list sm5803_get_chg_det(int chgnum, int *chg_det);
/* Expose Vbus discharge function */
enum ec_error_list sm5803_set_vbus_disch(int chgnum, int enable);
void sm5803_interrupt(int chgnum);
extern const struct charger_drv sm5803_drv;
#endif
|