diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-12-06 21:34:41 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-08 18:31:30 +0000 |
| commit | 2cc2bd2d2f7613e211f36b0d3e383ef38d03aabd (patch) | |
| tree | 6999fde4cf1b365957d2b4def4409c23168f19c7 | |
| parent | e1f6db512f540363588cb3c3cd77702ad5759821 (diff) | |
| download | coreboot-2cc2bd2d2f7613e211f36b0d3e383ef38d03aabd.tar.gz | |
mb/google/kahlee: use gpio.h include
Replace the amdblocks/gpio.h, amdblocks/gpio_defs.h and soc/gpio.h
includes with the common gpio.h which will include soc/gpio.h which will
include amdblocks/gpio.h which will include amdblocks/gpio_defs.h in the
AMD SoC case.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I13bc33b91f6e6d52867da9043bb386f3befac5fb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70433
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
6 files changed, 6 insertions, 7 deletions
diff --git a/src/mainboard/google/kahlee/bootblock/bootblock.c b/src/mainboard/google/kahlee/bootblock/bootblock.c index 0ee9b58110..ff3f289d54 100644 --- a/src/mainboard/google/kahlee/bootblock/bootblock.c +++ b/src/mainboard/google/kahlee/bootblock/bootblock.c @@ -2,7 +2,7 @@ #include <baseboard/variants.h> #include <bootblock_common.h> -#include <soc/gpio.h> +#include <gpio.h> #include <soc/southbridge.h> #include <amdblocks/lpc.h> #include <variant/ec.h> diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c index 9cbfd4be46..51cc4f10ff 100644 --- a/src/mainboard/google/kahlee/mainboard.c +++ b/src/mainboard/google/kahlee/mainboard.c @@ -10,8 +10,8 @@ #include <amdblocks/i2c.h> #include <baseboard/variants.h> #include <boardid.h> +#include <gpio.h> #include <smbios.h> -#include <soc/gpio.h> #include <soc/pci_devs.h> #include <soc/southbridge.h> #include <amdblocks/acpimmio.h> diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 4b2fc9ab15..0983724b7a 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -3,7 +3,7 @@ #include <amdblocks/dimm_spd.h> #include <arch/romstage.h> #include <baseboard/variants.h> -#include <soc/gpio.h> +#include <gpio.h> int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) { diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 8f228353f4..5155f4437b 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <baseboard/variants.h> -#include <soc/gpio.h> +#include <gpio.h> #include <soc/southbridge.h> #include <variant/gpio.h> diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h index 3ee027c4e4..1ec333121c 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/gpio.h @@ -4,8 +4,7 @@ #define __BASEBOARD_GPIO_H__ #ifndef __ACPI__ -#include <amdblocks/gpio_defs.h> -#include <soc/gpio.h> +#include <gpio.h> # define MEM_CONFIG0 GPIO_139 # define MEM_CONFIG1 GPIO_142 diff --git a/src/mainboard/google/kahlee/variants/baseboard/tpm_tis.c b/src/mainboard/google/kahlee/variants/baseboard/tpm_tis.c index 1c879529d4..2e3cfb8d15 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/tpm_tis.c +++ b/src/mainboard/google/kahlee/variants/baseboard/tpm_tis.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <gpio.h> #include <security/tpm/tis.h> -#include <soc/gpio.h> #include <variant/gpio.h> int tis_plat_irq_status(void) |