diff options
author | Bora Guvendik <bora.guvendik@intel.com> | 2022-02-28 14:43:49 -0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-16 13:12:05 +0000 |
commit | a15b25f6fd3b121913508bf6b603856d5026be2c (patch) | |
tree | 937af3198d16eee54e5d9284855aca312ce077e6 | |
parent | 7e3159c3d2ee0d1aa51aac57fbeb34ffc08255e7 (diff) | |
download | coreboot-a15b25f6fd3b121913508bf6b603856d5026be2c.tar.gz |
soc/intel: Add Raptor Lake device IDs
Add Raptor Lake specific CPU, System Agent, PCH, IGD device IDs.
References:
RaptorLake External Design Specification Volume 1 (640555)
600/700 Series PCH External Design Specification Volume 1 (626817)
Change-Id: I39e655dec2314a672ea63ba90d8bb3fc53bf77ba
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63750
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com>
20 files changed, 161 insertions, 10 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 6d3685194f..384b000a4e 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -59,4 +59,6 @@ #define CPUID_ALDERLAKE_N_A0 0xb06e0 #define CPUID_METEORLAKE_A0_1 0xa06a0 #define CPUID_METEORLAKE_A0_2 0xa06a1 +#define CPUID_RAPTORLAKE_P_J0 0xb06a2 + #endif /* CPU_INTEL_CPU_IDS_H */ diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 7c460f9052..317698633d 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3008,8 +3008,6 @@ #define PCI_DID_INTEL_ADP_P_ESPI_29 0x7a1d #define PCI_DID_INTEL_ADP_P_ESPI_30 0x7a1e #define PCI_DID_INTEL_ADP_P_ESPI_31 0x7a1f -#define PCI_DID_INTEL_ADP_P_ESPI_32 0x5181 -#define PCI_DID_INTEL_ADP_P_ESPI_33 0x5182 #define PCI_DID_INTEL_ADP_S_ESPI_0 0x7a80 #define PCI_DID_INTEL_ADP_S_ESPI_1 0x7a81 #define PCI_DID_INTEL_ADP_S_ESPI_2 0x7a82 @@ -3074,7 +3072,6 @@ #define PCI_DID_INTEL_ADP_M_N_ESPI_29 0x549d #define PCI_DID_INTEL_ADP_M_N_ESPI_30 0x549e #define PCI_DID_INTEL_ADP_M_N_ESPI_31 0x549f -#define PCI_DID_INTEL_ADP_M_ESPI_32 0x5186 #define PCI_DID_INTEL_SPR_ESPI_1 0x1b80 #define PCI_DID_INTEL_MTL_ESPI_0 0x7e00 #define PCI_DID_INTEL_MTL_ESPI_1 0x7e01 @@ -3084,6 +3081,38 @@ #define PCI_DID_INTEL_MTL_ESPI_5 0x7e05 #define PCI_DID_INTEL_MTL_ESPI_6 0x7e06 #define PCI_DID_INTEL_MTL_ESPI_7 0x7e07 +#define PCI_DID_INTEL_RPP_P_ESPI_0 0x5180 +#define PCI_DID_INTEL_RPP_P_ADP_P_ESPI_1 0x5181 +#define PCI_DID_INTEL_RPP_P_ADP_P_ESPI_2 0x5182 +#define PCI_DID_INTEL_RPP_P_ESPI_3 0x5183 +#define PCI_DID_INTEL_RPP_P_ESPI_4 0x5184 +#define PCI_DID_INTEL_RPP_P_ESPI_5 0x5185 +#define PCI_DID_INTEL_RPP_P_ADP_M_ESPI_6 0x5186 +#define PCI_DID_INTEL_RPP_P_ESPI_7 0x5187 +#define PCI_DID_INTEL_RPP_P_ESPI_8 0x5188 +#define PCI_DID_INTEL_RPP_P_ESPI_9 0x5189 +#define PCI_DID_INTEL_RPP_P_ESPI_10 0x518a +#define PCI_DID_INTEL_RPP_P_ESPI_11 0x518b +#define PCI_DID_INTEL_RPP_P_ESPI_12 0x518c +#define PCI_DID_INTEL_RPP_P_ESPI_13 0x518d +#define PCI_DID_INTEL_RPP_P_ESPI_14 0x518e +#define PCI_DID_INTEL_RPP_P_ESPI_15 0x518f +#define PCI_DID_INTEL_RPP_P_ESPI_16 0x5190 +#define PCI_DID_INTEL_RPP_P_ESPI_17 0x5191 +#define PCI_DID_INTEL_RPP_P_ESPI_18 0x5192 +#define PCI_DID_INTEL_RPP_P_ESPI_19 0x5193 +#define PCI_DID_INTEL_RPP_P_ESPI_20 0x5194 +#define PCI_DID_INTEL_RPP_P_ESPI_21 0x5195 +#define PCI_DID_INTEL_RPP_P_ESPI_22 0x5196 +#define PCI_DID_INTEL_RPP_P_ESPI_23 0x5197 +#define PCI_DID_INTEL_RPP_P_ESPI_24 0x5198 +#define PCI_DID_INTEL_RPP_P_ESPI_25 0x5199 +#define PCI_DID_INTEL_RPP_P_ESPI_26 0x519a +#define PCI_DID_INTEL_RPP_P_ESPI_27 0x519b +#define PCI_DID_INTEL_RPP_P_ESPI_28 0x519c +#define PCI_DID_INTEL_RPP_P_ESPI_29 0x519d +#define PCI_DID_INTEL_RPP_P_ESPI_30 0x519e +#define PCI_DID_INTEL_RPP_P_ESPI_31 0x519f /* Intel PCIE device ids */ #define PCI_DID_INTEL_LPT_H_PCIE_RP1 0x8c10 @@ -3434,6 +3463,10 @@ #define PCI_DID_INTEL_MTL_IOE_P_PCIE_RP11 0x7ecb #define PCI_DID_INTEL_MTL_IOE_P_PCIE_RP12 0x7ecc +#define PCI_DID_INTEL_RPL_P_PCIE_RP1 0xa74d +#define PCI_DID_INTEL_RPL_P_PCIE_RP2 0xa70d +#define PCI_DID_INTEL_RPL_P_PCIE_RP3 0xa72d + /* Intel SATA device Ids */ #define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_IDE 0x8c00 #define PCI_DID_INTEL_LPT_H_DESKTOP_SATA_AHCI 0x8c02 @@ -3506,6 +3539,8 @@ #define PCI_DID_INTEL_ADP_M_SATA_2 0x54d7 #define PCI_DID_INTEL_ADP_M_SATA_3 0x282a #define PCI_DID_INTEL_MTL_SATA 0x7e63 +#define PCI_DID_INTEL_RPP_P_SATA_1 0x51d3 +#define PCI_DID_INTEL_RPP_P_SATA_2 0x51d7 /* Intel PMC device Ids */ #define PCI_DID_INTEL_SPT_LP_PMC 0x9d21 @@ -3530,6 +3565,7 @@ #define PCI_DID_INTEL_MTL_SOC_PMC 0x7e21 #define PCI_DID_INTEL_MTL_IOE_M_PMC 0x7ebe #define PCI_DID_INTEL_MTL_IOE_P_PMC 0x7ece +#define PCI_DID_INTEL_RPP_P_PMC 0x51a1 /* Intel I2C device Ids */ #define PCI_DID_INTEL_LPT_LP_I2C0 0x9c61 @@ -3959,6 +3995,9 @@ #define PCI_DID_INTEL_MTL_M_GT2 0x7d40 #define PCI_DID_INTEL_MTL_P_GT2_1 0x7d50 #define PCI_DID_INTEL_MTL_P_GT2_2 0x7d60 +#define PCI_DID_INTEL_RPL_P_GT1 0xa720 +#define PCI_DID_INTEL_RPL_P_GT2 0xa7a8 +#define PCI_DID_INTEL_RPL_P_GT3 0xa7a0 /* Intel Northbridge Ids */ @@ -4079,6 +4118,8 @@ #define PCI_DID_INTEL_MTL_M_ID 0x7D00 #define PCI_DID_INTEL_MTL_P_ID_1 0x7D01 #define PCI_DID_INTEL_MTL_P_ID_2 0x7D02 +#define PCI_DID_INTEL_RPL_P_ID_1 0xa706 +#define PCI_DID_INTEL_RPL_P_ID_2 0xa707 /* Intel SMBUS device Ids */ #define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22 @@ -4102,6 +4143,7 @@ #define PCI_DID_INTEL_ADP_S_SMBUS 0x7aa3 #define PCI_DID_INTEL_ADP_M_N_SMBUS 0x54a3 #define PCI_DID_INTEL_MTL_SMBUS 0x7e22 +#define PCI_DID_INTEL_RPP_P_SMBUS 0x51a3 /* Intel EHCI device IDs */ #define PCI_DID_INTEL_LPT_H_EHCI_1 0x8c26 @@ -4137,6 +4179,7 @@ #define PCI_DID_INTEL_MTL_XHCI 0x7e7d #define PCI_DID_INTEL_MTL_M_TCSS_XHCI 0x7eb0 #define PCI_DID_INTEL_MTL_P_TCSS_XHCI 0x7ec0 +#define PCI_DID_INTEL_RPP_P_TCSS_XHCI 0xa71e /* Intel P2SB device Ids */ #define PCI_DID_INTEL_APL_P2SB 0x5a92 @@ -4161,6 +4204,7 @@ #define PCI_DID_INTEL_MTL_SOC_P2SB 0x7e20 #define PCI_DID_INTEL_MTL_IOE_M_P2SB 0x7eb8 #define PCI_DID_INTEL_MTL_IOE_P_P2SB 0x7ec8 +#define PCI_DID_INTEL_RPP_P_P2SB 0x51a0 /* Intel SRAM device Ids */ #define PCI_DID_INTEL_APL_SRAM 0x5aec @@ -4206,6 +4250,7 @@ #define PCI_DID_INTEL_ADP_S_AUDIO_7 0x7ad6 #define PCI_DID_INTEL_ADP_S_AUDIO_8 0x7ad7 #define PCI_DID_INTEL_ADP_P_AUDIO 0x51c8 +#define PCI_DID_INTEL_RPP_P_AUDIO 0x51ca #define PCI_DID_INTEL_ADP_M_N_AUDIO_1 0x54c8 #define PCI_DID_INTEL_ADP_M_N_AUDIO_2 0x54c9 @@ -4337,6 +4382,11 @@ #define PCI_DID_INTEL_MTL_M_TBT_DMA0 0x7eb2 #define PCI_DID_INTEL_MTL_P_TBT_DMA0 0x7ec2 #define PCI_DID_INTEL_MTL_P_TBT_DMA1 0x7ec3 +#define PCI_DID_INTEL_RPL_TBT_RP0 0xa76e +#define PCI_DID_INTEL_RPL_TBT_RP1 0xa73f +#define PCI_DID_INTEL_RPL_TBT_RP2 0xa72f +#define PCI_DID_INTEL_RPL_TBT_DMA0 0xa73e +#define PCI_DID_INTEL_RPL_TBT_DMA1 0xa76d /* Intel WIFI Ids */ #define PCI_DID_1000_SERIES_WIFI 0x0084 @@ -4376,6 +4426,7 @@ #define PCI_DID_INTEL_ADL_IPU 0x465d #define PCI_DID_INTEL_ADL_N_IPU 0x462e #define PCI_DID_INTEL_MTL_IPU 0x7d19 +#define PCI_DID_INTEL_RPL_IPU 0xa75d /* Intel Dynamic Tuning Technology Device */ #define PCI_DID_INTEL_CML_DTT 0x1903 @@ -4383,6 +4434,7 @@ #define PCI_DID_INTEL_JSL_DTT 0x4E03 #define PCI_DID_INTEL_ADL_DTT 0x461d #define PCI_DID_INTEL_MTL_DTT 0x7d03 +#define PCI_DID_INTEL_RPL_DTT 0xa71d /* Intel CNVi WiFi/BT device IDs */ #define PCI_DID_INTEL_CML_LP_CNVI_WIFI 0x02f0 @@ -4427,6 +4479,7 @@ #define PCI_DID_INTEL_ADP_N_PMC_CRASHLOG_SRAM 0x54ef #define PCI_DID_INTEL_TGP_PMC_CRASHLOG_SRAM 0xa0ef #define PCI_DID_INTEL_MTL_CRASHLOG_SRAM 0x7d0d +#define PCI_DID_INTEL_RPL_CPU_CRASHLOG_SRAM 0xa77d #define PCI_VID_COMPUTONE 0x8e0e #define PCI_DID_COMPUTONE_IP2EX 0x0291 diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index bdce2b7b84..f2bed738bf 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -29,6 +29,7 @@ static struct { { CPUID_ALDERLAKE_Q0, "Alderlake Q0 Platform" }, { CPUID_ALDERLAKE_R0, "Alderlake R0 Platform" }, { CPUID_ALDERLAKE_N_A0, "Alderlake-N Platform" }, + { CPUID_RAPTORLAKE_P_J0, "Raptorlake-P J0 Platform" }, }; static struct { @@ -50,6 +51,8 @@ static struct { { PCI_DID_INTEL_ADL_N_ID_2, "Alderlake-N" }, { PCI_DID_INTEL_ADL_N_ID_3, "Alderlake-N" }, { PCI_DID_INTEL_ADL_N_ID_4, "Alderlake-N" }, + { PCI_DID_INTEL_RPL_P_ID_1, "Raptorlake-P" }, + { PCI_DID_INTEL_RPL_P_ID_2, "Raptorlake-P" }, }; @@ -89,11 +92,40 @@ static struct { { PCI_DID_INTEL_ADP_P_ESPI_29, "Alderlake-P SKU" }, { PCI_DID_INTEL_ADP_P_ESPI_30, "Alderlake-P SKU" }, { PCI_DID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" }, - { PCI_DID_INTEL_ADP_P_ESPI_32, "Alderlake-P SKU" }, - { PCI_DID_INTEL_ADP_P_ESPI_33, "Alderlake-P SKU" }, - { PCI_DID_INTEL_ADP_M_ESPI_32, "Alderlake-M SKU" }, { PCI_DID_INTEL_ADP_M_N_ESPI_1, "Alderlake-N SKU" }, { PCI_DID_INTEL_ADP_M_N_ESPI_2, "Alderlake-N SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_0, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ADP_P_ESPI_1, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ADP_P_ESPI_2, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_3, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_4, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_5, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ADP_M_ESPI_6, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_7, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_8, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_9, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_10, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_11, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_12, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_13, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_14, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_15, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_16, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_17, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_18, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_19, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_20, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_21, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_22, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_23, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_24, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_25, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_26, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_27, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_28, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_29, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_30, "Raptorlake-P SKU" }, + { PCI_DID_INTEL_RPP_P_ESPI_31, "Raptorlake-P SKU" }, }; static struct { @@ -127,6 +159,9 @@ static struct { { PCI_DID_INTEL_ADL_N_GT1, "Alderlake N GT1" }, { PCI_DID_INTEL_ADL_N_GT2, "Alderlake N GT2" }, { PCI_DID_INTEL_ADL_N_GT3, "Alderlake N GT3" }, + { PCI_DID_INTEL_RPL_P_GT1, "Raptorlake P GT1" }, + { PCI_DID_INTEL_RPL_P_GT2, "Raptorlake P GT2" }, + { PCI_DID_INTEL_RPL_P_GT3, "Raptorlake P GT3" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index 7d4fb9cdf2..fc4ca61f2d 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -231,6 +231,11 @@ enum adl_cpu_type get_adl_cpu_type(void) PCI_DID_INTEL_ADL_N_ID_4, }; + const uint16_t rpl_p_mch_ids[] = { + PCI_DID_INTEL_RPL_P_ID_1, + PCI_DID_INTEL_RPL_P_ID_2, + }; + const uint16_t mchid = pci_s_read_config16(PCI_DEV(0, PCI_SLOT(SA_DEVFN_ROOT), PCI_FUNC(SA_DEVFN_ROOT)), PCI_DEVICE_ID); @@ -255,6 +260,11 @@ enum adl_cpu_type get_adl_cpu_type(void) return ADL_N; } + for (size_t i = 0; i < ARRAY_SIZE(rpl_p_mch_ids); i++) { + if (rpl_p_mch_ids[i] == mchid) + return RPL_P; + } + return ADL_UNKNOWN; } @@ -265,6 +275,7 @@ uint8_t get_supported_lpm_mask(void) case ADL_M: /* fallthrough */ case ADL_N: case ADL_P: + case RPL_P: return LPM_S0i2_0 | LPM_S0i3_0; case ADL_S: return LPM_S0i2_0 | LPM_S0i2_1; diff --git a/src/soc/intel/alderlake/include/soc/cpu.h b/src/soc/intel/alderlake/include/soc/cpu.h index cd6f34f663..424e02a6aa 100644 --- a/src/soc/intel/alderlake/include/soc/cpu.h +++ b/src/soc/intel/alderlake/include/soc/cpu.h @@ -25,6 +25,7 @@ enum adl_cpu_type { ADL_N, ADL_P, ADL_S, + RPL_P, }; enum adl_cpu_type get_adl_cpu_type(void); diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 6105a617f0..9b4278fa1b 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -76,6 +76,7 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_ALDERLAKE_Q0 }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_R0 }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_N_A0 }, + { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_J0 }, { 0, 0 }, }; diff --git a/src/soc/intel/common/block/dsp/dsp.c b/src/soc/intel/common/block/dsp/dsp.c index 2bb12b777f..03aa4e52ce 100644 --- a/src/soc/intel/common/block/dsp/dsp.c +++ b/src/soc/intel/common/block/dsp/dsp.c @@ -21,6 +21,7 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_AUDIO_6, PCI_DID_INTEL_MTL_AUDIO_7, PCI_DID_INTEL_MTL_AUDIO_8, + PCI_DID_INTEL_RPP_P_AUDIO, PCI_DID_INTEL_APL_AUDIO, PCI_DID_INTEL_CNL_AUDIO, PCI_DID_INTEL_GLK_AUDIO, diff --git a/src/soc/intel/common/block/dtt/dtt.c b/src/soc/intel/common/block/dtt/dtt.c index 5fe883c2de..a1a03ec289 100644 --- a/src/soc/intel/common/block/dtt/dtt.c +++ b/src/soc/intel/common/block/dtt/dtt.c @@ -5,6 +5,7 @@ #include <device/pci_ids.h> static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_RPL_DTT, PCI_DID_INTEL_MTL_DTT, PCI_DID_INTEL_CML_DTT, PCI_DID_INTEL_TGL_DTT, diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 5fc67aa06c..33ffa7f364 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -177,6 +177,9 @@ static const struct device_operations graphics_ops = { }; static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_RPL_P_GT1, + PCI_DID_INTEL_RPL_P_GT2, + PCI_DID_INTEL_RPL_P_GT3, PCI_DID_INTEL_MTL_M_GT2, PCI_DID_INTEL_MTL_P_GT2_1, PCI_DID_INTEL_MTL_P_GT2_2, diff --git a/src/soc/intel/common/block/hda/hda.c b/src/soc/intel/common/block/hda/hda.c index 0143a4080f..fd0ab4abd5 100644 --- a/src/soc/intel/common/block/hda/hda.c +++ b/src/soc/intel/common/block/hda/hda.c @@ -29,6 +29,7 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_AUDIO_6, PCI_DID_INTEL_MTL_AUDIO_7, PCI_DID_INTEL_MTL_AUDIO_8, + PCI_DID_INTEL_RPP_P_AUDIO, PCI_DID_INTEL_APL_AUDIO, PCI_DID_INTEL_GLK_AUDIO, PCI_DID_INTEL_SKL_AUDIO, diff --git a/src/soc/intel/common/block/ipu/ipu.c b/src/soc/intel/common/block/ipu/ipu.c index ead4094af3..a496f0abe8 100644 --- a/src/soc/intel/common/block/ipu/ipu.c +++ b/src/soc/intel/common/block/ipu/ipu.c @@ -12,6 +12,7 @@ struct device_operations ipu_pci_ops = { }; static const uint16_t pci_device_ids[] = { + PCI_DID_INTEL_RPL_IPU, PCI_DID_INTEL_TGL_IPU, PCI_DID_INTEL_TGL_H_IPU, PCI_DID_INTEL_JSL_IPU, diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 81c7a6e766..2ba4cd60a7 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -146,6 +146,38 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_ESPI_5, PCI_DID_INTEL_MTL_ESPI_6, PCI_DID_INTEL_MTL_ESPI_7, + PCI_DID_INTEL_RPP_P_ESPI_0, + PCI_DID_INTEL_RPP_P_ADP_P_ESPI_1, + PCI_DID_INTEL_RPP_P_ADP_P_ESPI_2, + PCI_DID_INTEL_RPP_P_ESPI_3, + PCI_DID_INTEL_RPP_P_ESPI_4, + PCI_DID_INTEL_RPP_P_ESPI_5, + PCI_DID_INTEL_RPP_P_ADP_M_ESPI_6, + PCI_DID_INTEL_RPP_P_ESPI_7, + PCI_DID_INTEL_RPP_P_ESPI_8, + PCI_DID_INTEL_RPP_P_ESPI_9, + PCI_DID_INTEL_RPP_P_ESPI_10, + PCI_DID_INTEL_RPP_P_ESPI_11, + PCI_DID_INTEL_RPP_P_ESPI_12, + PCI_DID_INTEL_RPP_P_ESPI_13, + PCI_DID_INTEL_RPP_P_ESPI_14, + PCI_DID_INTEL_RPP_P_ESPI_15, + PCI_DID_INTEL_RPP_P_ESPI_16, + PCI_DID_INTEL_RPP_P_ESPI_17, + PCI_DID_INTEL_RPP_P_ESPI_18, + PCI_DID_INTEL_RPP_P_ESPI_19, + PCI_DID_INTEL_RPP_P_ESPI_20, + PCI_DID_INTEL_RPP_P_ESPI_21, + PCI_DID_INTEL_RPP_P_ESPI_22, + PCI_DID_INTEL_RPP_P_ESPI_23, + PCI_DID_INTEL_RPP_P_ESPI_24, + PCI_DID_INTEL_RPP_P_ESPI_25, + PCI_DID_INTEL_RPP_P_ESPI_26, + PCI_DID_INTEL_RPP_P_ESPI_27, + PCI_DID_INTEL_RPP_P_ESPI_28, + PCI_DID_INTEL_RPP_P_ESPI_29, + PCI_DID_INTEL_RPP_P_ESPI_30, + PCI_DID_INTEL_RPP_P_ESPI_31, PCI_DID_INTEL_SPT_LP_SAMPLE, PCI_DID_INTEL_SPT_LP_U_BASE, PCI_DID_INTEL_SPT_LP_U_PREMIUM, @@ -316,8 +348,6 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_ADP_P_ESPI_29, PCI_DID_INTEL_ADP_P_ESPI_30, PCI_DID_INTEL_ADP_P_ESPI_31, - PCI_DID_INTEL_ADP_P_ESPI_32, - PCI_DID_INTEL_ADP_P_ESPI_33, PCI_DID_INTEL_ADP_S_ESPI_0, PCI_DID_INTEL_ADP_S_ESPI_1, PCI_DID_INTEL_ADP_S_ESPI_2, @@ -350,7 +380,6 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_ADP_S_ESPI_29, PCI_DID_INTEL_ADP_S_ESPI_30, PCI_DID_INTEL_ADP_S_ESPI_31, - PCI_DID_INTEL_ADP_P_ESPI_32, PCI_DID_INTEL_ADP_M_N_ESPI_0, PCI_DID_INTEL_ADP_M_N_ESPI_1, PCI_DID_INTEL_ADP_M_N_ESPI_2, @@ -382,7 +411,6 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_ADP_M_N_ESPI_29, PCI_DID_INTEL_ADP_M_N_ESPI_30, PCI_DID_INTEL_ADP_M_N_ESPI_31, - PCI_DID_INTEL_ADP_M_ESPI_32, PCI_DID_INTEL_SPR_ESPI_1, 0 }; diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 2517f69e96..c23947c473 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -139,6 +139,7 @@ static const struct device_operations device_ops = { static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_SOC_P2SB, + PCI_DID_INTEL_RPP_P_P2SB, PCI_DID_INTEL_APL_P2SB, PCI_DID_INTEL_GLK_P2SB, PCI_DID_INTEL_LWB_P2SB, diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index 11038ab5b2..d43528644c 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -66,6 +66,9 @@ static struct device_operations device_ops = { }; static const unsigned short pcie_device_ids[] = { + PCI_DID_INTEL_RPL_P_PCIE_RP1, + PCI_DID_INTEL_RPL_P_PCIE_RP2, + PCI_DID_INTEL_RPL_P_PCIE_RP3, PCI_DID_INTEL_MTL_SOC_PCIE_RP1, PCI_DID_INTEL_MTL_SOC_PCIE_RP2, PCI_DID_INTEL_MTL_SOC_PCIE_RP3, diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index fcfc7b28a8..73594cd07f 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -114,6 +114,7 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_SOC_PMC, PCI_DID_INTEL_MTL_IOE_M_PMC, PCI_DID_INTEL_MTL_IOE_P_PMC, + PCI_DID_INTEL_RPP_P_PMC, PCI_DID_INTEL_DNV_PMC, PCI_DID_INTEL_SPT_LP_PMC, PCI_DID_INTEL_SPT_H_PMC, diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c index bc3c1b1d94..d0dc11855e 100644 --- a/src/soc/intel/common/block/sata/sata.c +++ b/src/soc/intel/common/block/sata/sata.c @@ -14,6 +14,8 @@ static struct device_operations sata_ops = { static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_SATA, + PCI_DID_INTEL_RPP_P_SATA_1, + PCI_DID_INTEL_RPP_P_SATA_2, PCI_DID_INTEL_SPT_U_SATA, PCI_DID_INTEL_SPT_U_Y_PREMIUM_SATA, PCI_DID_INTEL_SPT_KBL_SATA, diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 3a500cac6d..380cda308d 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -115,6 +115,7 @@ static struct device_operations smbus_ops = { static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_SMBUS, + PCI_DID_INTEL_RPP_P_SMBUS, PCI_DID_INTEL_APL_SMBUS, PCI_DID_INTEL_CNL_SMBUS, PCI_DID_INTEL_CNP_H_SMBUS, diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 51fb0e53da..55e892c941 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -452,6 +452,8 @@ static const unsigned short systemagent_ids[] = { PCI_DID_INTEL_ADL_N_ID_2, PCI_DID_INTEL_ADL_N_ID_3, PCI_DID_INTEL_ADL_N_ID_4, + PCI_DID_INTEL_RPL_P_ID_1, + PCI_DID_INTEL_RPL_P_ID_2, 0 }; diff --git a/src/soc/intel/common/block/usb4/usb4.c b/src/soc/intel/common/block/usb4/usb4.c index 86bd09bb9d..d62496e4d8 100644 --- a/src/soc/intel/common/block/usb4/usb4.c +++ b/src/soc/intel/common/block/usb4/usb4.c @@ -53,6 +53,8 @@ static void tbt_dma_fill_ssdt(const struct device *dev) #endif static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_RPL_TBT_DMA0, + PCI_DID_INTEL_RPL_TBT_DMA1, PCI_DID_INTEL_MTL_M_TBT_DMA0, PCI_DID_INTEL_MTL_P_TBT_DMA0, PCI_DID_INTEL_MTL_P_TBT_DMA1, diff --git a/src/soc/intel/common/block/usb4/xhci.c b/src/soc/intel/common/block/usb4/xhci.c index 20ed2a5865..d1a2dc6659 100644 --- a/src/soc/intel/common/block/usb4/xhci.c +++ b/src/soc/intel/common/block/usb4/xhci.c @@ -26,6 +26,7 @@ static struct device_operations usb4_xhci_ops = { }; static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_RPP_P_TCSS_XHCI, PCI_DID_INTEL_MTL_M_TCSS_XHCI, PCI_DID_INTEL_MTL_P_TCSS_XHCI, PCI_DID_INTEL_TGP_TCSS_XHCI, |