diff options
| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-11-14 13:10:35 +0100 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-05-15 13:22:39 +0000 |
| commit | eb9f1e14380301c9691bbed2fcc1d968fc2cdc8c (patch) | |
| tree | baa439b3ad09df601c4753db772a37f0f9bcce40 | |
| parent | 465fbbe93ee01b4576689a90b7ddbeec23cdace2 (diff) | |
| download | coreboot-eb9f1e14380301c9691bbed2fcc1d968fc2cdc8c.tar.gz | |
mb/msi/ms7d25: Update USB port macros
Update USB port macros:
- change onboard ports to SHORT: MYSTIC LIGHT, LAN_USB1, PS2_USB1,
HUB to USB 2.0 headers, HUB to rear USB 2.0
- change USB type C header to LONG which caused hard lockups on the
port making it unable to enumerate in UEFI Payload and Linux
- add empty definitions for USBr ports
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I91198aa713e9084ff3906c267ee1b37b10c71843
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69820
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
| -rw-r--r-- | src/mainboard/msi/ms7d25/devicetree.cb | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb index d50a950ab6..e175afa454 100644 --- a/src/mainboard/msi/ms7d25/devicetree.cb +++ b/src/mainboard/msi/ms7d25/devicetree.cb @@ -13,20 +13,22 @@ chip soc/intel/alderlake register "pmc_gpe0_dw2" = "GPD" # USB Configuration - register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # USB-C LAN_USB1 - register "usb2_ports[1]" = "USB2_PORT_MAX(OC1)" # MSI MYSTIC LIGHT - register "usb2_ports[2]" = "USB2_PORT_MAX(OC0)" # USB-A LAN_USB1 - register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC0)" # JUSB5 - register "usb2_ports[4]" = "USB2_PORT_MAX(OC3)" # HUB to rear USB 2.0 + register "usb2_ports[0]" = "USB2_PORT_SHORT(OC2)" # USB-C LAN_USB1 + register "usb2_ports[1]" = "USB2_PORT_SHORT(OC1)" # MSI MYSTIC LIGHT + register "usb2_ports[2]" = "USB2_PORT_SHORT(OC0)" # USB-A LAN_USB1 + register "usb2_ports[3]" = "USB2_PORT_LONG(OC0)" # JUSB5 + register "usb2_ports[4]" = "USB2_PORT_SHORT(OC3)" # HUB to rear USB 2.0 register "usb2_ports[5]" = "USB2_PORT_LONG(OC3)" # empty? register "usb2_ports[6]" = "USB2_PORT_LONG(OC7)" # JUSB4 register "usb2_ports[7]" = "USB2_PORT_LONG(OC0)" # JUSB4 register "usb2_ports[8]" = "USB2_PORT_LONG(OC2)" # JUSB3 register "usb2_ports[9]" = "USB2_PORT_LONG(OC7)" # JUSB3 - register "usb2_ports[10]" = "USB2_PORT_MAX(OC0)" # PS2_USB1 - register "usb2_ports[11]" = "USB2_PORT_MAX(OC0)" # PS2_USB1 - register "usb2_ports[12]" = "USB2_PORT_MAX(OC0)" # HUB to USB 2.0 headers - register "usb2_ports[13]" = "USB2_PORT_MAX(OC6)" # CNVi BT + register "usb2_ports[10]" = "USB2_PORT_SHORT(OC0)" # PS2_USB1 + register "usb2_ports[11]" = "USB2_PORT_SHORT(OC0)" # PS2_USB1 + register "usb2_ports[12]" = "USB2_PORT_SHORT(OC0)" # HUB to USB 2.0 headers + register "usb2_ports[13]" = "USB2_PORT_SHORT(OC6)" # CNVi BT + register "usb2_ports[14]" = "USB2_PORT_EMPTY" # USB Redirection port 1 + register "usb2_ports[15]" = "USB2_PORT_EMPTY" # USB Redirection port 2 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # USB-C LAN_USB1 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB-A LAN_USB1 |