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| author | Subrata Banik <subratabanik@google.com> | 2022-04-06 18:41:25 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-04-11 06:15:52 +0000 |
| commit | 9bc5b0097bacf456306e05a95a8b86440d405a17 (patch) | |
| tree | d6edec7761a3854fced349a154522d404222fd02 /src/drivers/intel/fsp2_0 | |
| parent | 9d8dac0dbe03f5deb1c9f6db349aef1c678a5ee3 (diff) | |
| download | coreboot-9bc5b0097bacf456306e05a95a8b86440d405a17.tar.gz | |
drivers/intel/fsp2_0: Allow coreboot to control FSP serial redirection
Commit 3ba6f8cdf (drivers/intel/fsp2_0: Add native implementation for
FSP Debug Handler) implements a native FSP debug handler.
However, coreboot still can't control when to redirect FSP debug
output to the serial console, i.e., at present, integrating a FSP debug
binary is enough to output FSP serial messages irrespective of whether
user is intended to see FSP debug log.
coreboot needs additional mechanism to control FSP debug binary to
redirect debug messages over serial port. This patch introduces a
config `FSP_ENABLE_SERIAL_DEBUG` to control the FSP debug output, user
to enable this config from site-local config file in case like to override
the default FSP serial redirection behaviour in more controlled way from
coreboot.
There could be scenarios as below:
Scenario 1: coreboot release image integrated with the FSP debug
binaries, is capable of redirecting to the serial console, but coreboot
decides to override the config as below to skip FSP debug output
redirection to the serial port.
`#`FSP Serial console disabled by default (do not remove)
`#`CONFIG_FSP_ENABLE_SERIAL_DEBUG is not set
Scenario 2: For coreboot serial image with FSP debug binaries integrated
but coreboot decides to skip FSP debug output redirection to the serial
port.
`#`FSP Serial console disabled by default (do not remove)
`#`CONFIG_FSP_ENABLE_SERIAL_DEBUG is not set
CONFIG_CONSOLE_SERIAL=y
CONFIG_CONSOLE_SERIAL_115200=y
CONFIG_UART_DEBUG=y
CONFIG_UART_FOR_CONSOLE=0
Scenario 3: The final image could be a coreboot serial image with FSP
serial redirection enabled to output to the serial port.
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
CONFIG_CONSOLE_SERIAL=y
CONFIG_CONSOLE_SERIAL_115200=y
CONFIG_UART_DEBUG=y
CONFIG_UART_FOR_CONSOLE=0
BUG=b:227151510
TEST=Able to build and boot google/redrix with all scenarios between #1--#3
and able to meet the expectation as mentioned above.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I0b008ca9d4f40bfa6a989a6fd655c234f91fde65
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63166
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0')
| -rw-r--r-- | src/drivers/intel/fsp2_0/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 1eccd61400..8c360630b8 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -369,4 +369,16 @@ config DISPLAY_FSP_TIMESTAMPS To be able to use this, FSP has to be compiled with `PcdFspPerformanceEnable` set to `TRUE`. +config FSP_ENABLE_SERIAL_DEBUG + bool "Output FSP debug messages on serial console" + default y + depends on FSP_USES_CB_DEBUG_EVENT_HANDLER + help + Output FSP debug messages on serial console. + + The config option is selected based on your FSP configuration i.e., debug or + release. Enable this option from site-local to print FSP serial messages using + coreboot native debug driver when coreboot has integrated the debug FSP + binaries. coreboot disables serial messages when this config is not enabled. + endif |