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authorElyes Haouas <ehaouas@noos.fr>2022-11-29 17:36:51 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-12-02 14:39:56 +0000
commitdc3beea75d3050600842112cfd7fd48baa65278d (patch)
treeca9839a61c90cc7b972650c0eb1a2e92a6a25eb9 /src/mainboard/lenovo
parent87a98b55b2466638587ea44fc7eaa13d93525656 (diff)
downloadcoreboot-dc3beea75d3050600842112cfd7fd48baa65278d.tar.gz
sb/intel/i82801gx: Use boolean for ide_enable_{primary,secondary}
Change-Id: Ia71692ecf74fd8921eeafabac9a4cb862da90e81 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70114 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/t60/mainboard.c2
-rw-r--r--src/mainboard/lenovo/thinkcentre_a58/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/x60/mainboard.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c
index 7ebe25e0af..5b38ec2417 100644
--- a/src/mainboard/lenovo/t60/mainboard.c
+++ b/src/mainboard/lenovo/t60/mainboard.c
@@ -34,7 +34,7 @@ static void mainboard_init(struct device *dev)
} else if (idedev && idedev->chip_info &&
h8_ultrabay_device_present()) {
config = idedev->chip_info;
- config->ide_enable_primary = 1;
+ config->ide_enable_primary = true;
pmh7_ultrabay_power_enable(1);
ec_write(0x0c, 0x84);
} else {
diff --git a/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb b/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb
index a4b9ac8e9f..9a2c452fb9 100644
--- a/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb
+++ b/src/mainboard/lenovo/thinkcentre_a58/devicetree.cb
@@ -31,7 +31,7 @@ chip northbridge/intel/x4x # Northbridge
# 2 SCI (if corresponding GPIO_EN bit is also set)
register "gpi13_routing" = "1" # ??vendor
- register "ide_enable_primary" = "0x1"
+ register "ide_enable_primary" = "true"
register "gpe0_en" = "0x440"
register "gen1_dec" = "0x00fc0a01"
diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c
index 2eb0c389f4..238d949002 100644
--- a/src/mainboard/lenovo/x60/mainboard.c
+++ b/src/mainboard/lenovo/x60/mainboard.c
@@ -37,7 +37,7 @@ static void mainboard_init(struct device *dev)
idedev = pcidev_on_root(0x1f, 1);
if (idedev && idedev->chip_info && dock_ultrabay_device_present()) {
struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
- config->ide_enable_primary = 1;
+ config->ide_enable_primary = true;
/* enable Ultrabay power */
outb(inb(0x1628) | 0x01, 0x1628);
ec_write(0x0c, 0x84);