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authorRichard Spiegel <richard.spiegel@silverbackltd.com>2017-12-25 18:25:58 -0700
committerMartin Roth <martinroth@google.com>2018-01-23 05:44:55 +0000
commite539c8538666d949c01d7bcbd8c714cee5d0148e (patch)
treef0410e1ff3df2769d2c4247fedb51058e0150698 /src/soc/amd/stoneyridge/include/soc/iomap.h
parent19a5ed1f3b4295639f0467823781807f6f03c713 (diff)
downloadcoreboot-e539c8538666d949c01d7bcbd8c714cee5d0148e.tar.gz
soc/amd/stoneyridge/southbridge.c: Create a GPIO programming function
Create a GPIO programming function that can be called from multiple stages (bootblock, romstage and ramstage) that will program only the GPIO specific to the particular stage. Add dummy table to kahlee, grunt and gardenia to be able to test a build. BUG=b:64140392 TEST=Build kahlee, grunt and gardenia with GPIO programming call at bootblock. This call is removed before commit, so bootblock.c is not committed. Change-Id: I88d65c78a186bed9739bc208d5711a31aa3c3bb6 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/22986 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include/soc/iomap.h')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/iomap.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h
index 2d42ad9ad9..72a1e8c6f5 100644
--- a/src/soc/amd/stoneyridge/include/soc/iomap.h
+++ b/src/soc/amd/stoneyridge/include/soc/iomap.h
@@ -61,4 +61,8 @@
#define AB_DATA (AB_INDX+4)
#define SYS_RESET 0xcf9
+/* GPIO control and mux access */
+#define AMD_GPIO_MUX (AMD_SB_ACPI_MMIO_ADDR + 0x00000d00)
+#define AMD_GPIO_CONTROL (AMD_SB_ACPI_MMIO_ADDR + 0x00001500)
+
#endif /* __SOC_STONEYRIDGE_IOMAP_H__ */