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author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-05-05 15:07:29 -0700 |
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committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-05-23 01:40:57 +0200 |
commit | 77ff0b1a01d3d640be55d301b2fcf09a3f840ffe (patch) | |
tree | c745968f84ca4638f3a27881a5ee3943cf39773f /src/soc/intel/braswell/include/soc/romstage.h | |
parent | b5ad827ee584a960212ae983e30cd1a0b18c55a5 (diff) | |
download | coreboot-77ff0b1a01d3d640be55d301b2fcf09a3f840ffe.tar.gz |
Braswell: Use Baytrail as Comparison Base
Add baytrail source for comparison with Braswell.
BRANCH=none
BUG=None
TEST=None
Change-Id: I5170addf41676d95a3daf070a32bcee085f8156d
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10117
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/include/soc/romstage.h')
-rw-r--r-- | src/soc/intel/braswell/include/soc/romstage.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h new file mode 100644 index 0000000000..f99a8e28bc --- /dev/null +++ b/src/soc/intel/braswell/include/soc/romstage.h @@ -0,0 +1,54 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _BAYTRAIL_ROMSTAGE_H_ +#define _BAYTRAIL_ROMSTAGE_H_ + +#if !defined(__PRE_RAM__) +#error "Don't include romstage.h from a ramstage compilation unit!" +#endif + +#include <stdint.h> +#include <arch/cpu.h> +#include <soc/mrc_wrapper.h> + +struct romstage_params { + unsigned long bist; + struct mrc_params *mrc_params; +}; + +void mainboard_romstage_entry(struct romstage_params *params); +void romstage_common(struct romstage_params *params); +void * asmlinkage romstage_main(unsigned long bist, uint32_t tsc_lo, + uint32_t tsc_high); +void asmlinkage romstage_after_car(void); +void raminit(struct mrc_params *mp, int prev_sleep_state); +void gfx_init(void); +void tco_disable(void); +void punit_init(void); +void set_max_freq(void); +int early_spi_read_wpsr(u8 *sr); + +#if CONFIG_ENABLE_BUILTIN_COM1 +void byt_config_com1_and_enable(void); +#else +static inline void byt_config_com1_and_enable(void) { } +#endif + +#endif /* _BAYTRAIL_ROMSTAGE_H_ */ |