diff options
| -rw-r--r-- | src/northbridge/intel/nehalem/romstage.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/early_pch.c | 6 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/pch.h | 1 |
3 files changed, 9 insertions, 2 deletions
diff --git a/src/northbridge/intel/nehalem/romstage.c b/src/northbridge/intel/nehalem/romstage.c index c465a99365..54766de0e7 100644 --- a/src/northbridge/intel/nehalem/romstage.c +++ b/src/northbridge/intel/nehalem/romstage.c @@ -45,11 +45,13 @@ void mainboard_romstage_entry(void) /* TODO, make this configurable */ nehalem_early_initialization(NEHALEM_MOBILE); - early_pch_init(); + pch_pre_console_init(); /* Initialize console device(s) */ console_init(); + early_pch_init(); + /* Read PM1_CNT, DON'T CLEAR IT or raminit will fail! */ reg32 = inl(DEFAULT_PMBASE + 0x04); printk(BIOS_DEBUG, "PM1_CNT: %08x\n", reg32); diff --git a/src/southbridge/intel/ibexpeak/early_pch.c b/src/southbridge/intel/ibexpeak/early_pch.c index 2707eb2cb8..ccd8f74431 100644 --- a/src/southbridge/intel/ibexpeak/early_pch.c +++ b/src/southbridge/intel/ibexpeak/early_pch.c @@ -80,10 +80,14 @@ static void pch_default_disable(void) RCBA32(FD2) = 1; } -void early_pch_init(void) +void pch_pre_console_init(void) { early_lpc_init(); mainboard_lpc_init(); +} + +void early_pch_init(void) +{ early_gpio_init(); /* TODO, make this configurable */ pch_setup_cir(NEHALEM_MOBILE); diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h index b9632371ac..1449ee914d 100644 --- a/src/southbridge/intel/ibexpeak/pch.h +++ b/src/southbridge/intel/ibexpeak/pch.h @@ -62,6 +62,7 @@ int smbus_block_read(unsigned device, unsigned cmd, u8 bytes, u8 *buf); int smbus_block_write(unsigned device, unsigned cmd, u8 bytes, const u8 *buf); #endif +void pch_pre_console_init(void); void early_pch_init(void); void early_thermal_init(void); |