| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | src/include: Add missing includes | Elyes HAOUAS | 2020-07-26 | 1 | -0/+2 |
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi | 2020-05-06 | 1 | -12/+1 |
| * | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi | 2020-05-06 | 1 | -2/+1 |
| * | src (minus soc and mainboard): Remove copyright notices | Patrick Georgi | 2020-03-17 | 1 | -1/+0 |
| * | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS | 2018-10-11 | 1 | -1/+0 |
| * | src/include: Wrap lines at 80 columns | Lee Leahy | 2017-03-13 | 1 | -2/+4 |
| * | tree: drop last paragraph of GPL copyright header | Patrick Georgi | 2015-10-31 | 1 | -4/+0 |
| * | Remove address from GPLv2 headers | Patrick Georgi | 2015-05-21 | 1 | -2/+1 |
| * | cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. | Keith Hui | 2011-08-04 | 1 | -0/+101 |
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index : delta/coreboot/coreboot.git | |
| review.coreboot.org: coreboot.git |
| summaryrefslogtreecommitdiff |