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path: root/src/soc/mediatek/mt8183/emi.c
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* soc/mediatek: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-051-13/+2
* soc/mediatek/mt8183: Improve the AC timing of DRAMCHuayang Duan2020-03-181-6/+16
* soc: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* soc/mediatek/mt8183: Do TX tracking for DRAM DVFS featureHuayang Duan2020-03-061-1/+8
* soc/mediatek/mt8183: Correct EMI bandwidth threshold for DVFS switchHuayang Duan2020-03-061-2/+4
* soc/mediatek/mt8183: Fix programming error of DRAMC settingHuayang Duan2020-02-251-3/+3
* Change all clrsetbits_leXX() to clrsetbitsXX()Julius Werner2019-12-041-19/+19
* soc/mediatek/mt8183: Disable DRAM DVFS in recovery modeYu-Ping Wu2019-10-311-1/+1
* soc/mediatek/mt8183: Pass MR values as function argumentsYu-Ping Wu2019-10-281-17/+17
* soc/mediatek/mt8183: Improve DRAM calibration logsYu-Ping Wu2019-10-241-10/+4
* soc/mediatek/mt8183: Pass impedance data as a function argumentYu-Ping Wu2019-10-181-11/+19
* soc/mediatek/mt8183: Run calibration with multiple frequencies for DVFS switchHuayang Duan2019-10-181-18/+154
* soc/mediatek/mt8183: Adjust DRAM voltages for each DRAM frequencyHuayang Duan2019-10-181-0/+28
* soc/mediatek/mt8183: Handle memory test failureYu-Ping Wu2019-10-171-4/+8
* soc/mediatek/mt8183: Change argument type of mt_set_emiYu-Ping Wu2019-10-091-4/+5
* soc/mediatek/mt8183: Use cached calibration result for faster bootupHuayang Duan2019-10-091-4/+9
* mediatek/mt8183: Use different DRAM frequencies for eMCP DDRHuayang Duan2019-09-241-6/+21
* mediatek/mt8183: Support more DRAM frequency bootupHuayang Duan2019-09-201-11/+50
* mediatek/mt8183: Implement the dramc init settingHuayang Duan2019-09-201-4/+5
* mediatek/mt8183: enable DDR low power featuremtk111952019-06-211-1/+11
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* mediatek/mt8183: Add DDR driver of runtime config partHuayang Duan2019-01-031-6/+16
* mediatek/mt8183: Add DDR driver of tx rx window perbit cal partHuayang Duan2018-12-111-1/+1
* mediatek/mt8183: Add DDR driver of cmd bus training partHuayang Duan2018-11-081-0/+1
* mediatek/mt8183: Add DDR driver of pre-calibration partHuayang Duan2018-11-081-4/+8
* mediatek/mt8183: Add DDR driver of software impedance partHuayang Duan2018-11-051-0/+1
* mediatek/mt8183: Correct MPU ctrl register addressHuayang Duan2018-10-261-6/+6
* mediatek/mt8183: Initialize DRAM with a sequence in constant arrayHuayang Duan2018-10-241-0/+1
* mediatek/mt8183: Add EMI init for DDR driver initHuayang Duan2018-10-181-1/+270
* mediatek/mt8183: Add a stub implementation of the MT8183 SOCTristan Shieh2018-06-111-0/+21
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