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delta/coreboot/coreboot.git
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path:
root
/
src
/
southbridge
/
amd
/
agesa
/
hudson
/
amd_pci_int_types.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
sb/amd: Remove dropped platforms
Arthur Heymans
2022-11-07
1
-27
/
+0
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
src/southbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-04
1
-13
/
+2
*
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-17
1
-1
/
+0
*
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-08
1
-2
/
+2
*
AGESA/binaryPI: Drop invalid AMD_AGESA_BOLTON
Kyösti Mälkki
2019-01-14
1
-1
/
+1
*
src/southbridge: Use "foo *bar" instead of "foo* bar"
Elyes HAOUAS
2018-07-09
1
-2
/
+2
*
southbridge/amd: add support for Bolton FCH
Felix Held
2015-11-20
1
-1
/
+1
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-21
1
-1
/
+1
*
AGESA: Remove redundant Avalon support from Hudson
Kyösti Mälkki
2014-11-20
1
-10
/
+0
*
AMD Steppe Eagle: New integrated southbridge (Avalon)
Bruce Griffith
2014-08-30
1
-0
/
+10
*
AMD/agesa: Add functions for AMD PCI IRQ routing
Dave Frodin
2014-07-02
1
-0
/
+44