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|
fw_config
field LTE 6
option LTE_ABSENT 0
option LTE_PRESENT 1
end
field SD_CARD 7
option SD_ABSENT 0
option SD_PRESENT 1
end
field STYLUS 8
option STYLUS_ABSENT 0
option STYLUS_PRESENT 1
end
field WFC 9
option WFC_ABSENT 0
option WFC_PRESENT 1
end
field THERMAL 10 11
option THERMAL_FAN_TABLE_0 0
option THERMAL_FAN_TABLE_1 1
option THERMAL_FAN_TABLE_2 2
option THERMAL_FAN_TABLE_3 3
end
field AUDIO 12 14
option ALC1019_ALC5682IVS 0
option MAX98357_ALC5682I 1
option MAX98357_ALC5682IVS 2
end
field EXT_VR 15
option EXT_VR_PRESENT 0
option EXT_VR_ABSENT 1
end
field WIFI_SAR_ID 16 17
option WIFI_SAR_TABLE_0 0
option WIFI_SAR_TABLE_1 1
option WIFI_SAR_TABLE_2 2
end
end
chip soc/intel/alderlake
# Acoustic settings
register "acoustic_noise_mitigation" = "1"
register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
register "PreWake" = "100"
register "sagv" = "SaGv_Enabled"
# EMMC Tx CMD Delay
# Refer to EDS-Vol2-42.3.7.
# [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
# [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
# EMMC TX DATA Delay 1
# Refer to EDS-Vol2-42.3.8.
# [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
# [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909"
# EMMC TX DATA Delay 2
# Refer to EDS-Vol2-42.3.9.
# [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
# [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
# [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
# [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828"
# EMMC RX CMD/DATA Delay 1
# Refer to EDS-Vol2-42.3.10.
# [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
# [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
# [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
# [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F1B"
# EMMC RX CMD/DATA Delay 2
# Refer to EDS-Vol2-42.3.12.
# [17:16] stands for Rx Clock before Output Buffer,
# 00: Rx clock after output buffer,
# 01: Rx clock before output buffer,
# 10: Automatic selection based on working mode.
# 11: Reserved
# [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
# [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10023"
# EMMC Rx Strobe Delay
# Refer to EDS-Vol2-42.3.11.
# [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
# [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x11515"
# SOC Aux orientation override:
# This is a bitfield that corresponds to up to 4 TCSS ports.
# Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
# TcssAuxOri = 0101b
# Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
# Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
# motherboard to USBC connector
register "tcss_aux_ori" = "5"
register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC Camera
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 port for WWAN
# FIVR configurations for Pujjoteen are disabled since the board doesn't have V1p05 and Vnn
# bypass rails implemented.
register "ext_fivr_settings" = "{
.configure_ext_fivr = 1,
}"
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| I2C0 | TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| I2C1 | Touchscreen |
#| I2C2 | Sub-board(PSensor)/WCAM |
#| I2C3 | Audio |
#| I2C5 | Trackpad |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.i2c[0] = {
.early_init = 1,
.speed = I2C_SPEED_FAST_PLUS,
.speed_config[0] = {
.speed = I2C_SPEED_FAST_PLUS,
.scl_lcnt = 55,
.scl_hcnt = 30,
.sda_hold = 7,
}
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 157,
.scl_hcnt = 79,
.sda_hold = 7,
}
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 157,
.scl_hcnt = 79,
.sda_hold = 7,
}
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 158,
.scl_hcnt = 79,
.sda_hold = 7,
}
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 158,
.scl_hcnt = 79,
.sda_hold = 7,
}
},
}"
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
## sensor information
register "options.tsr[0].desc" = ""CPU""
register "options.tsr[1].desc" = ""DDR""
register "options.tsr[2].desc" = ""5VCharger""
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 60000),
[3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 15000),
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN),
}"
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.max_power = 6000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,
},
.pl2 = {
.min_power = 20000,
.max_power = 20000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 1000,
}
}"
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 3000 },
[1] = { 24, 2000 },
[2] = { 16, 1500 },
[3] = { 8, 1000 }
}"
device generic 0 on
probe THERMAL THERMAL_FAN_TABLE_0
end
end
chip drivers/intel/dptf
## sensor information
register "options.tsr[0].desc" = ""CPU""
register "options.tsr[1].desc" = ""DDR""
register "options.tsr[2].desc" = ""5VCharger""
# TODO: below values are initial reference values only
## Active Policy
register "policies.active" = "{
[0] = {
.target = DPTF_CPU,
.thresholds = {
TEMP_PCT(80, 100),
TEMP_PCT(75, 98),
TEMP_PCT(70, 86),
TEMP_PCT(65, 70),
TEMP_PCT(60, 70),
}
},
[1] = {
.target = DPTF_TEMP_SENSOR_1,
.thresholds = {
TEMP_PCT(50, 70),
TEMP_PCT(47, 58),
TEMP_PCT(45, 47),
TEMP_PCT(42, 45),
TEMP_PCT(39, 39),
}
},
[2] = {
.target = DPTF_TEMP_SENSOR_2,
.thresholds = {
TEMP_PCT(50, 70),
TEMP_PCT(47, 58),
TEMP_PCT(45, 47),
TEMP_PCT(42, 45),
TEMP_PCT(39, 39),
}
},
}"
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 6000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 6000),
[3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 6000),
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN),
}"
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.max_power = 15000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 200,
},
.pl2 = {
.min_power = 35000,
.max_power = 35000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 1000,
}
}"
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 1700 },
[1] = { 24, 1500 },
[2] = { 16, 1000 },
[3] = { 8, 500 }
}"
## Fan Performance Control (Percent, Speed, Noise, Power)
register "controls.fan_perf" = "{
[0] = { 100, 6000, 220, 2200, },
[1] = { 92, 5500, 180, 1800, },
[2] = { 85, 5000, 145, 1450, },
[3] = { 70, 4400, 115, 1150, },
[4] = { 56, 3900, 90, 900, },
[5] = { 45, 3300, 55, 550, },
[6] = { 39, 3000, 30, 300, },
[7] = { 33, 2900, 15, 150, },
[8] = { 10, 800, 10, 100, },
[9] = { 0, 0, 0, 50, }
}"
## Fan options
register "options.fan.fine_grained_control" = "1"
register "options.fan.step_size" = "2"
device generic 1 on
probe THERMAL THERMAL_FAN_TABLE_1
end
end
end
device ref i2c1 on
chip drivers/i2c/hid
register "generic.hid" = ""ELAN901C""
register "generic.desc" = ""ELAN Touchscreen""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
register "generic.probed" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
register "generic.reset_delay_ms" = "20"
register "generic.reset_off_delay_ms" = "2"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_delay_ms" = "280"
register "generic.stop_off_delay_ms" = "2"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
chip drivers/i2c/hid
register "generic.hid" = ""GTCH7503""
register "generic.desc" = ""G2TOUCH Touchscreen""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
register "generic.probed" = "1"
register "generic.reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
register "generic.reset_delay_ms" = "50"
register "generic.enable_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end
chip drivers/generic/gpio_keys
register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"
register "key.wake_gpe" = "GPE0_DW2_15"
register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""pen_eject""
device generic 0 on
probe STYLUS STYLUS_PRESENT
end
end
end
device ref i2c2 on
chip drivers/i2c/sx9324
register "desc" = ""SAR Proximity Sensor""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)"
register "speed" = "I2C_SPEED_FAST"
register "uid" = "1"
register "reg_gnrl_ctrl0" = "0x16"
register "reg_gnrl_ctrl1" = "0x21"
register "reg_afe_ctrl0" = "0x00"
register "reg_afe_ctrl1" = "0x10"
register "reg_afe_ctrl2" = "0x00"
register "reg_afe_ctrl3" = "0x00"
register "reg_afe_ctrl4" = "0x47"
register "reg_afe_ctrl5" = "0x00"
register "reg_afe_ctrl6" = "0x00"
register "reg_afe_ctrl7" = "0x47"
register "reg_afe_ctrl8" = "0x12"
register "reg_afe_ctrl9" = "0x08"
register "reg_afe_ph0" = "0x3d"
register "reg_afe_ph1" = "0x1b"
register "reg_afe_ph2" = "0x1f"
register "reg_afe_ph3" = "0x3d"
register "reg_prox_ctrl0" = "0x0b"
register "reg_prox_ctrl1" = "0x0a"
register "reg_prox_ctrl2" = "0x90"
register "reg_prox_ctrl3" = "0x60"
register "reg_prox_ctrl4" = "0x0c"
register "reg_prox_ctrl5" = "0x00"
register "reg_prox_ctrl6" = "0x19"
register "reg_prox_ctrl7" = "0x58"
register "reg_adv_ctrl0" = "0x00"
register "reg_adv_ctrl1" = "0x00"
register "reg_adv_ctrl2" = "0x00"
register "reg_adv_ctrl3" = "0x00"
register "reg_adv_ctrl4" = "0x00"
register "reg_adv_ctrl5" = "0x05"
register "reg_adv_ctrl6" = "0x00"
register "reg_adv_ctrl7" = "0x00"
register "reg_adv_ctrl8" = "0x00"
register "reg_adv_ctrl9" = "0x00"
register "reg_adv_ctrl10" = "0x00"
register "reg_adv_ctrl11" = "0x00"
register "reg_adv_ctrl12" = "0x00"
register "reg_adv_ctrl13" = "0x00"
register "reg_adv_ctrl14" = "0x80"
register "reg_adv_ctrl15" = "0x0c"
register "reg_adv_ctrl16" = "0x08"
register "reg_adv_ctrl17" = "0x56"
register "reg_adv_ctrl18" = "0x33"
register "reg_adv_ctrl19" = "0x00"
register "reg_adv_ctrl20" = "0x00"
register "ph0_pin" = "{1, 3, 3}"
register "ph1_pin" = "{3, 2, 1}"
register "ph2_pin" = "{3, 3, 1}"
register "ph3_pin" = "{1, 3, 3}"
register "ph01_resolution" = "1024"
register "ph23_resolution" = "1024"
register "startup_sensor" = "1"
register "ph01_proxraw_strength" = "3"
register "ph23_proxraw_strength" = "2"
register "avg_pos_strength" = "256"
register "cs_idle_sleep" = ""hi-z""
register "int_comp_resistor" = ""lowest""
register "input_precharge_resistor_ohms" = "4000"
register "input_analog_gain" = "1"
device i2c 28 on
probe LTE LTE_PRESENT
end
end
end
device ref i2c3 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Headset Codec""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_count" = "1"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
device i2c 1a on
probe AUDIO MAX98357_ALC5682I
end
end
chip drivers/i2c/generic
register "hid" = ""RTL5682""
register "name" = ""RT58""
register "desc" = ""Headset Codec""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_count" = "1"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
device i2c 1a on
probe AUDIO ALC1019_ALC5682IVS
probe AUDIO MAX98357_ALC5682IVS
end
end
chip drivers/generic/alc1015
register "hid" = ""RTL1019""
register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
device generic 0 on
probe AUDIO ALC1019_ALC5682IVS
end
end
end
device ref i2c5 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad""
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
register "wake" = "GPE0_DW2_14"
register "detect" = "1"
device i2c 15 on end
end
chip drivers/i2c/hid
register "generic.hid" = ""SYNA0000""
register "generic.cid" = ""ACPI0C50""
register "generic.desc" = ""Synaptics Touchpad""
register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
register "generic.wake" = "GPE0_DW2_14"
register "generic.detect" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 0x2c on end
end
end
device ref hda on
chip drivers/generic/max98357a
register "hid" = ""MX98360A""
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
register "sdmode_delay" = "5"
device generic 0 on
probe AUDIO MAX98357_ALC5682I
probe AUDIO MAX98357_ALC5682IVS
end
end
end
device ref pcie_rp4 on
# PCIe 4 WLAN
register "pch_pcie_rp[PCH_RP(4)]" = "{
.clk_src = 2,
.clk_req = 2,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
chip drivers/wifi/generic
register "wake" = "GPE0_DW1_03"
register "add_acpi_dma_property" = "true"
device pci 00.0 on end
end
end
device ref pcie_rp7 on
# Enable SD Card PCIe 7 using clk 3
register "pch_pcie_rp[PCH_RP(7)]" = "{
.clk_src = 3,
.clk_req = 3,
.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
}"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H12)"
register "srcclk_pin" = "3"
register "enable_delay_ms" = "50"
device generic 0 on end
end
probe SD_CARD SD_PRESENT
end
device ref pch_espi on
chip ec/google/chromeec
use conn0 as mux_conn[0]
device pnp 0c09.0 on end
end
end
device ref pmc hidden
chip drivers/intel/pmc_mux
device generic 0 on
chip drivers/intel/pmc_mux/conn
use usb2_port1 as usb2_port
use tcss_usb3_port1 as usb3_port
device generic 0 alias conn0 on end
end
end
end
end
device ref tcss_xhci on
chip drivers/usb/acpi
device ref tcss_root_hub on
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
end
end
end
device ref xhci on
chip drivers/usb/acpi
device ref xhci_root_hub on
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 WWAN""
register "type" = "UPC_TYPE_INTERNAL"
device ref usb2_port2 on
probe LTE LTE_PRESENT
end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A1 (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
device ref usb2_port4 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 UFC""
register "type" = "UPC_TYPE_INTERNAL"
device ref usb2_port6 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 WFC""
register "type" = "UPC_TYPE_INTERNAL"
device ref usb2_port7 on
probe WFC WFC_PRESENT
end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
register "desc" = ""CNVi Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
device ref usb2_port10 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A1 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
device ref usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 WWAN""
register "type" = "UPC_TYPE_INTERNAL"
device ref usb3_port3 on
probe LTE LTE_PRESENT
end
end
end
end
end
end
end
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