diff options
| author | Penny Chiu <pchiu@nvidia.com> | 2013-06-05 16:35:33 +0800 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-06-10 12:27:16 -0600 |
| commit | 737ec8332c8329a67358941df9452a89edfb862b (patch) | |
| tree | ed7777aae3b6e58d4a08b951b270af53ba4d7005 /src/t114/parse_t114.c | |
| parent | 79789fd80d5959147d60948984dfaa20a186bec7 (diff) | |
| download | nvidia-cbootimage-737ec8332c8329a67358941df9452a89edfb862b.tar.gz | |
Add support for Tegra114 SPI boot device
This patch adds SpiFlashParams to generate/dump BCT for SPI flash.
Signed-off-by: Penny Chiu <pchiu@nvidia.com>
Acked-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'src/t114/parse_t114.c')
| -rw-r--r-- | src/t114/parse_t114.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/t114/parse_t114.c b/src/t114/parse_t114.c index 81ac024..17f612e 100644 --- a/src/t114/parse_t114.c +++ b/src/t114/parse_t114.c @@ -26,7 +26,9 @@ enum_item s_devtype_table_t114[] = { { "NvBootDevType_Sdmmc", nvboot_dev_type_sdmmc }, + { "NvBootDevType_Spi", nvboot_dev_type_spi }, { "Sdmmc", nvboot_dev_type_sdmmc }, + { "Spi", nvboot_dev_type_spi }, { NULL, 0 } }; @@ -44,6 +46,16 @@ enum_item s_sdmmc_data_width_table_t114[] = { { NULL, 0 } }; +enum_item s_spi_clock_source_table_t114[] = { + { "NvBootSpiClockSource_PllPOut0", nvboot_spi_clock_source_pllp_out0 }, + { "NvBootSpiClockSource_ClockM", nvboot_spi_clock_source_clockm }, + { "ClockSource_PllPOut0", nvboot_spi_clock_source_pllp_out0 }, + { "ClockSource_ClockM", nvboot_spi_clock_source_clockm }, + { "PllPOut0", nvboot_spi_clock_source_pllp_out0 }, + { "ClockM", nvboot_spi_clock_source_clockm }, + { NULL, 0 } +}; + enum_item s_nvboot_memory_type_table_t114[] = { { "NvBootMemoryType_None", nvboot_memory_type_none }, { "NvBootMemoryType_Ddr3", nvboot_memory_type_ddr3 }, @@ -398,8 +410,21 @@ field_item s_sdmmc_table_t114[] = { { NULL, 0, 0, NULL } }; +field_item s_spiflash_table_t114[] = { + { "ReadCommandTypeFast", TOKEN(spiflash_read_command_type_fast) }, + { "PageSize2kor16k", TOKEN(spiflash_page_size_2k_or_16k) }, + { "ClockDivider", TOKEN(spiflash_clock_divider) }, + { "ClockSource", + token_spiflash_clock_source, + field_type_enum, + s_spi_clock_source_table_t114 }, + { NULL, 0, 0, NULL } +}; + parse_subfield_item s_device_type_table_t114[] = { { "SdmmcParams.", token_sdmmc_params, s_sdmmc_table_t114, t114_set_dev_param }, + { "SpiFlashParams.", token_spiflash_params, + s_spiflash_table_t114, t114_set_dev_param }, { NULL, 0, NULL } }; |