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author | Jeffrey Walton <noloader@gmail.com> | 2017-05-25 06:46:40 -0400 |
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committer | Jeffrey Walton <noloader@gmail.com> | 2017-05-25 06:46:40 -0400 |
commit | bd7aa155a6c78e6e4381b883ccfca7c6ad1ad983 (patch) | |
tree | 6bfb541187ef245d9c2bcbbf66d27880f94b3970 | |
parent | b447a7bf1561c222fa1d299adfaf2510a5ad3203 (diff) | |
download | cryptopp-git-bd7aa155a6c78e6e4381b883ccfca7c6ad1ad983.tar.gz |
Revert "Avoid extra ByteReverse"
This reverts commit 3b56ba118f34. It broke Tiger and SEAL. Arg...
-rw-r--r-- | iterhash.cpp | 11 | ||||
-rw-r--r-- | sha.cpp | 2 |
2 files changed, 5 insertions, 8 deletions
diff --git a/iterhash.cpp b/iterhash.cpp index f8be97d9..bdc99ec5 100644 --- a/iterhash.cpp +++ b/iterhash.cpp @@ -83,14 +83,11 @@ template <class T, class BASE> byte * IteratedHashBase<T, BASE>::CreateUpdateSpa template <class T, class BASE> size_t IteratedHashBase<T, BASE>::HashMultipleBlocks(const T *input, size_t length)
{
-#if CRYPTOPP_BOOL_SSE_SHA_INTRINSICS_AVAILABLE
- // SHA-1 and SHA-256 only
- static const bool noReverse = HasSHA() && this->BlockSize() <= 64;
-#else
- const bool noReverse = NativeByteOrderIs(this->GetByteOrder());
-#endif
-
+ // Hardware based SHA1 and SHA256 correct blocks themselves due to hardware requirements.
+ // For Intel, SHA1 will effectively call ByteReverse(). SHA256 formats data to Intel
+ // requirements, which means eight words ABCD EFGH are transformed to ABEF CDGH.
unsigned int blockSize = this->BlockSize();
+ bool noReverse = NativeByteOrderIs(this->GetByteOrder());
T* dataBuf = this->DataBuf();
do
{
@@ -112,7 +112,7 @@ static void SHA1_SSE_SHA_Transform(word32 *state, const word32 *data) ABCD = _mm_loadu_si128((__m128i*) state);
E0 = _mm_set_epi32(state[4], 0, 0, 0);
ABCD = _mm_shuffle_epi32(ABCD, 0x1B);
- MASK = _mm_set_epi8(0,1,2,3, 4,5,6,7, 8,9,10,11, 12,13,14,15);
+ MASK = _mm_set_epi8(3,2,1,0, 7,6,5,4, 11,10,9,8, 15,14,13,12);
// Save current hash
ABCD_SAVE = ABCD;
|