diff options
| author | Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> | 2022-04-21 22:34:52 +0530 |
|---|---|---|
| committer | Raviteja Goud Talla <ravitejax.goud.talla@intel.com> | 2022-04-21 23:04:33 +0530 |
| commit | d95b12e7e3ed6a22f284afbc5d2356365b820ea8 (patch) | |
| tree | d3dd1dc975d02848baa4e3ed8d6f73cb19f4105d /intel | |
| parent | 62e25c8baac80d6af1287c964d5d83eb255ef339 (diff) | |
| download | drm-d95b12e7e3ed6a22f284afbc5d2356365b820ea8.tar.gz | |
intel: Add support for RPLP
Add RPLP platform support and PCIIDs
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
Diffstat (limited to 'intel')
| -rw-r--r-- | intel/i915_pciids.h | 9 | ||||
| -rw-r--r-- | intel/intel_chipset.c | 3 |
2 files changed, 11 insertions, 1 deletions
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h index 8076d40c..33017726 100644 --- a/intel/i915_pciids.h +++ b/intel/i915_pciids.h @@ -666,6 +666,15 @@ INTEL_VGA_DEVICE(0x46C2, info), \ INTEL_VGA_DEVICE(0x46C3, info) +/* RPL-P */ +#define INTEL_RPLP_IDS(info) \ + INTEL_VGA_DEVICE(0xA720, info), \ + INTEL_VGA_DEVICE(0xA721, info), \ + INTEL_VGA_DEVICE(0xA7A0, info), \ + INTEL_VGA_DEVICE(0xA7A1, info), \ + INTEL_VGA_DEVICE(0xA7A8, info), \ + INTEL_VGA_DEVICE(0xA7A9, info) + /* ADL-N */ #define INTEL_ADLN_IDS(info) \ INTEL_VGA_DEVICE(0x46D0, info), \ diff --git a/intel/intel_chipset.c b/intel/intel_chipset.c index 99ad04ae..ee8866c1 100644 --- a/intel/intel_chipset.c +++ b/intel/intel_chipset.c @@ -35,9 +35,10 @@ static const struct pci_device { uint16_t gen; } pciids[] = { /* Keep ids sorted by gen; latest gen first */ - INTEL_RPLS_IDS(12), INTEL_ADLN_IDS(12), + INTEL_RPLP_IDS(12), INTEL_ADLP_IDS(12), + INTEL_RPLS_IDS(12), INTEL_ADLS_IDS(12), INTEL_RKL_IDS(12), INTEL_DG1_IDS(12), |