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| author | Rickard Green <rickard@erlang.org> | 2021-02-21 17:06:44 +0100 |
|---|---|---|
| committer | Rickard Green <rickard@erlang.org> | 2021-02-21 17:06:44 +0100 |
| commit | 705ff63f3dcde47258449dc86ef96847d410dfd1 (patch) | |
| tree | 990083728c27eea1bb03231a6b6d028ea7dd9883 /erts/include | |
| parent | c056ac98882b0559f142cada1a8be940bb73edcf (diff) | |
| parent | bdc09edba0821e1fa5dad3a929c54ae0bcd8da4f (diff) | |
| download | erlang-705ff63f3dcde47258449dc86ef96847d410dfd1.tar.gz | |
Merge branch 'rickard/armv8-further-membar-improvements/OTP-17195' into maint
* rickard/armv8-further-membar-improvements/OTP-17195:
Improve memory barrier usage on 64-bit ARM when compiling with gcc
Remove unnecessary data dependency read barrier on ARM when identified as aarch64
Fix configure test for arm memory barrier instructions
Diffstat (limited to 'erts/include')
| -rw-r--r-- | erts/include/internal/gcc/ethr_membar.h | 3 | ||||
| -rw-r--r-- | erts/include/internal/gcc/ethread.h | 8 |
2 files changed, 10 insertions, 1 deletions
diff --git a/erts/include/internal/gcc/ethr_membar.h b/erts/include/internal/gcc/ethr_membar.h index 4e1eb1117e..aeef8115a3 100644 --- a/erts/include/internal/gcc/ethr_membar.h +++ b/erts/include/internal/gcc/ethr_membar.h @@ -247,7 +247,8 @@ ethr_full_fence__(void) * Add more archs as needed... */ -#if !defined(__ia64__) && !defined(__arm__) && !defined(__arm64__) +#if !defined(__ia64__) && !defined(__arm__) && !defined(__arm64__) \ + && !defined(__aarch32__) && !defined(__aarch64__) # define ETHR_READ_DEPEND_MEMORY_BARRIER ETHR_MEMBAR(ETHR_LoadLoad) #endif diff --git a/erts/include/internal/gcc/ethread.h b/erts/include/internal/gcc/ethread.h index 300a8c6922..5584648614 100644 --- a/erts/include/internal/gcc/ethread.h +++ b/erts/include/internal/gcc/ethread.h @@ -80,6 +80,14 @@ #elif !ETHR_AT_LEAST_GCC_VSN__(4, 8, 0) /* True gcc of version < 4.8, i.e., bug exist... */ # define ETHR___atomic_load_ACQUIRE_barrier_bug ETHR_GCC_VERSIONS_MASK__ +#elif ETHR_AT_LEAST_GCC_VSN__(8, 3, 0) \ + && (defined(__arm64__) || defined(__aarch64__) || defined(__arm__)) \ + && ETHR_SIZEOF_PTR == 8 +/* Verified not to have this bug */ +# define ETHR___atomic_load_ACQUIRE_barrier_bug 0 +/* Also trust builtin barriers */ +# undef ETHR_TRUST_GCC_ATOMIC_BUILTINS_MEMORY_BARRIERS__ +# define ETHR_TRUST_GCC_ATOMIC_BUILTINS_MEMORY_BARRIERS__ 1 #elif ETHR_AT_LEAST_GCC_VSN__(9, 3, 0) \ && (defined(__powerpc__) || defined(__ppc__) || defined(__powerpc64__)) \ && ETHR_SIZEOF_PTR == 8 |