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authorKian-Meng, Ang <kianmeng@cpan.org>2021-11-17 10:59:45 +0800
committerKian-Meng, Ang <kianmeng@cpan.org>2021-11-17 10:59:45 +0800
commit18cc15bcb502b25ffb9771ee8b38a328d03bda54 (patch)
tree5ba1ce904cee43316e764ac0a91b6acc3b382666 /erts/lib_src/pthread
parentf8481a4bac07bc224e59629fda7e887411b40bcf (diff)
downloaderlang-18cc15bcb502b25ffb9771ee8b38a328d03bda54.tar.gz
Fix typos in erts/lib_src
Diffstat (limited to 'erts/lib_src/pthread')
-rw-r--r--erts/lib_src/pthread/ethread.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/erts/lib_src/pthread/ethread.c b/erts/lib_src/pthread/ethread.c
index 2a7f6aa18a..95587d73b4 100644
--- a/erts/lib_src/pthread/ethread.c
+++ b/erts/lib_src/pthread/ethread.c
@@ -146,7 +146,7 @@ ppc_init__(void)
{
int pid;
- /* If anything what so ever failes we assume no lwsync for safety */
+ /* If anything what so ever fails we assume no lwsync for safety */
ethr_runtime__.conf.have_lwsync = 0;
/*
@@ -219,7 +219,7 @@ ethr_x86_cpuid__(int *eax, int *ebx, int *ecx, int *edx)
#endif
#if ETHR_SIZEOF_PTR == 4 && defined(__PIC__) && __PIC__
/*
- * When position independet code is used in 32-bit mode, the B register
+ * When position independent code is used in 32-bit mode, the B register
* is used for storage of global offset table address, and we may not
* use it as input or output in an asm. We need to save and restore the
* B register explicitly (for some reason gcc doesn't provide this