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author | RĂ©mi Denis-Courmont <remi@remlab.net> | 2022-10-02 14:54:58 +0300 |
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committer | Lynne <dev@lynne.ee> | 2022-10-05 08:26:19 +0200 |
commit | 37d5ddc317c35bded22fee8d79020653781d8230 (patch) | |
tree | 0e4162777730cfeea45976bda4fa350af573b5a5 /libavutil/riscv | |
parent | b25c6a5704ac114e825577209a610f5e95abe6c0 (diff) | |
download | ffmpeg-37d5ddc317c35bded22fee8d79020653781d8230.tar.gz |
lavu/riscv: CPU flag for the Zbb extension
Unfortunately, it is common, and will remain so, that the Bit
manipulations are not enabled at compilation time. This is an official
policy for Debian ports in general (though they do not support RISC-V
officially as of yet) to stick to the minimal target baseline, which
does not include the B extension or even its Zbb subset.
For inline helpers (CPOP, REV8), compiler builtins (CTZ, CLZ) or
even plain C code (MIN, MAX, MINU, MAXU), run-time detection seems
impractical. But at least it can work for the byte-swap DSP functions.
Diffstat (limited to 'libavutil/riscv')
-rw-r--r-- | libavutil/riscv/cpu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c index e234201395..a9263dbb78 100644 --- a/libavutil/riscv/cpu.c +++ b/libavutil/riscv/cpu.c @@ -40,6 +40,8 @@ int ff_get_cpu_flags_riscv(void) ret |= AV_CPU_FLAG_RVF; if (hwcap & HWCAP_RV('D')) ret |= AV_CPU_FLAG_RVD; + if (hwcap & HWCAP_RV('B')) + ret |= AV_CPU_FLAG_RVB_BASIC; /* The V extension implies all Zve* functional subsets */ if (hwcap & HWCAP_RV('V')) @@ -57,6 +59,10 @@ int ff_get_cpu_flags_riscv(void) #endif #endif +#ifdef __riscv_zbb + ret |= AV_CPU_FLAG_RVB_BASIC; +#endif + /* If RV-V is enabled statically at compile-time, check the details. */ #ifdef __riscv_vectors ret |= AV_CPU_FLAG_RVV_I32; |