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author | Lynne <dev@lynne.ee> | 2023-02-01 02:26:20 +0100 |
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committer | Lynne <dev@lynne.ee> | 2023-02-01 04:23:55 +0100 |
commit | bbe95f7353a972f28a48be8da883549f02c59e4b (patch) | |
tree | 08841c9da55e7f076f6046d1dbd70f49d74c0ec0 /libswscale/x86/scale.asm | |
parent | fc9a3b584da3cf3fc1f00036be2eaf5dff903ccf (diff) | |
download | ffmpeg-bbe95f7353a972f28a48be8da883549f02c59e4b.tar.gz |
x86: replace explicit REP_RETs with RETs
From x86inc:
> On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either
> a branch or a branch target. So switch to a 2-byte form of ret in that case.
> We can automatically detect "follows a branch", but not a branch target.
> (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.)
x86inc can automatically determine whether to use REP_RET rather than
REP in most of these cases, so impact is minimal. Additionally, a few
REP_RETs were used unnecessary, despite the return being nowhere near a
branch.
The only CPUs affected were AMD K10s, made between 2007 and 2011, 16
years ago and 12 years ago, respectively.
In the future, everyone involved with x86inc should consider dropping
REP_RETs altogether.
Diffstat (limited to 'libswscale/x86/scale.asm')
-rw-r--r-- | libswscale/x86/scale.asm | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/libswscale/x86/scale.asm b/libswscale/x86/scale.asm index c62ae3dcc2..2e14c8c023 100644 --- a/libswscale/x86/scale.asm +++ b/libswscale/x86/scale.asm @@ -357,7 +357,7 @@ cglobal hscale%1to%2_%4, %5, 10, %6, pos0, dst, w, srcmem, filter, fltpos, fltsi add wq, 2 %endif ; %3 ==/!= X jl .loop - REP_RET + RET %endmacro ; SCALE_FUNCS source_width, intermediate_nbits, n_xmm |