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author | Urja Rannikko <urjaman@gmail.com> | 2015-06-29 23:24:23 +0000 |
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committer | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2015-06-29 23:24:23 +0000 |
commit | 0b4ffd58aaca065c55a7933df286dbe275d9ebd7 (patch) | |
tree | 2efb5b97da732f7bb35990a4eb86cd1bf59f13e2 /serprog.c | |
parent | 25e9f40e21e715e4ee6183a42c8521406f91b258 (diff) | |
download | flashrom-git-0b4ffd58aaca065c55a7933df286dbe275d9ebd7.tar.gz |
serprog: Fix FWH/LPC by implementing serprog_map
The serprog protocol does only transmit 24 bit-wide address and ignores the
top 8 bit. This is fine as long as the underlying hardware ignores the latter
anyway (which is the case for parallel chips that even lack the respective pins).
FWH/LPC chips, however, operate on a full 32-bit (LPC) or 28-bit (FWH) address
space and would fail with the fallback mapping to NULL.
Corresponding to flashrom svn r1895.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Diffstat (limited to 'serprog.c')
-rw-r--r-- | serprog.c | 16 |
1 files changed, 16 insertions, 0 deletions
@@ -943,3 +943,19 @@ static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, } return 0; } + +void *serprog_map(const char *descr, uintptr_t phys_addr, size_t len) +{ + /* Serprog transmits 24 bits only and assumes the underlying implementation handles any remaining bits + * correctly (usually setting them to one either in software (for FWH/LPC) or relying on the fact that + * the hardware observes a subset of the address bits only). Combined with the standard mapping of + * flashrom this creates a 16 MB-wide window just below the 4 GB boundary where serprog can operate (as + * needed for non-SPI chips). Below we make sure that the requested range is within this window. */ + if ((phys_addr & 0xFF000000) == 0xFF000000) { + return (void*)phys_addr; + } else { + msg_pwarn(MSGHEADER "requested mapping %s is incompatible: 0x%zx bytes at 0x%0*" PRIxPTR ".\n", + descr, len, PRIxPTR_WIDTH, phys_addr); + return NULL; + } +} |