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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-21 15:02:22 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-21 15:02:22 +0000
commit620d2e7f6ff68efb07efad0ffa7bfc32e5e3a471 (patch)
tree2acf13dbff407eadf1c9753118bd4ead7d2016cd
parent59740d130ebfd5d4eb0c18bd9d3cf44368ad6687 (diff)
downloadflashrom-620d2e7f6ff68efb07efad0ffa7bfc32e5e3a471.tar.gz
Add support for the SST25VF064C SPI flash chip.
Signed-off-by: Ed Swierk <eswierk@aristanetworks.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--flashchips.c35
-rw-r--r--flashchips.h1
2 files changed, 36 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index 368db41..3842170 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -3971,6 +3971,41 @@ struct flashchip flashchips[] = {
{
.vendor = "SST",
+ .name = "SST25VF064C",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = SST_ID,
+ .model_id = SST_25VF064C,
+ .total_size = 8192,
+ .page_size = 256,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 2048} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 256} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 128} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {8 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {8 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_1,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "SST",
.name = "SST25VF040.REMS",
.bustype = CHIP_BUSTYPE_SPI,
.manufacture_id = SST_ID,
diff --git a/flashchips.h b/flashchips.h
index d3771f7..63cba1e 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -400,6 +400,7 @@
#define SST_25VF016B 0x2541
#define SST_25VF032B 0x254A
#define SST_25VF032B_REMS 0x4A /* REMS or RES opcode */
+#define SST_25VF064C 0x254B
#define SST_26VF016 0x2601
#define SST_26VF032 0x2602
#define SST_27SF512 0xA4