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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2009-08-18 23:50:14 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2009-08-18 23:50:14 +0000
commit853e08242a312746e89877526e0ac3a44e4f4499 (patch)
treeabca514b4edace471298522117525964a43a34bb
parent2d03de0064bc019d1101dcd6cd4a31691a2eed8a (diff)
downloadflashrom-853e08242a312746e89877526e0ac3a44e4f4499.tar.gz
Tidy up docs before release. Don't mention coreboot.org without context.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--README13
-rw-r--r--flashrom.84
2 files changed, 5 insertions, 12 deletions
diff --git a/README b/README
index 070acff..65152e6 100644
--- a/README
+++ b/README
@@ -2,17 +2,14 @@
flashrom README
-------------------------------------------------------------------------------
-flashrom is a utility for reading, writing, verifying and erasing flash ROM
-chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
-using a supported mainboard, but it also supports flashing of network
+flashrom is a utility for detecting, reading, writing, verifying and erasing
+flash chips. It is often used to flash BIOS/EFI/coreboot/firmware images
+in-system using a supported mainboard, but it also supports flashing of network
cards (NICs), SATA controller cards, and other external devices which can
program flash chips.
-It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and
-TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash,
-or SPI.
-
-(see http://coreboot.org for details on coreboot)
+It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40
+chips, which use various protocols such as LPC, FWH, parallel flash, or SPI.
Packaging
diff --git a/flashrom.8 b/flashrom.8
index 9089123..fb4ded3 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -15,10 +15,6 @@ flash chips.
It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and
TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash,
or SPI.
-.PP
-(see
-.B http://coreboot.org
-for details on coreboot)
.SH OPTIONS
Please note that the command line interface for flashrom will change before
flashrom 1.0. Do not use flashrom in scripts or other automated tools without