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author | krause <krause@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-01-17 07:45:54 +0000 |
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committer | krause <krause@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-01-17 07:45:54 +0000 |
commit | 8afaf634a5b34fcd9794ac201819af4010611ef1 (patch) | |
tree | f0c14d77bbce7ee950aedc228c745e0f16f255e1 | |
parent | e13eed403b638d3213fd43f1d8d719650affd67a (diff) | |
download | flashrom-8afaf634a5b34fcd9794ac201819af4010611ef1.tar.gz |
The AT26DF081A requires the Write Enable Latch (WLE) to be set for
write/erase operations. Also bit 5 is the Erase/Program Error (EPE) bit,
so has nothing to do with the block protection. Ignore it when testing
for block protections.
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Tested-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | flashchips.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/flashchips.c b/flashchips.c index b6dff6c..873b8f2 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1477,7 +1477,8 @@ struct flashchip flashchips[] = { .model_id = ATMEL_AT26DF081A, .total_size = 1024, .page_size = 256, - .tested = TEST_OK_PR, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -1499,7 +1500,7 @@ struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, |