diff options
| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-05-08 00:24:18 +0000 |
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| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-05-08 00:24:18 +0000 |
| commit | bcd13bbb8576cb11e7283d3a7e5fb5227b40dca8 (patch) | |
| tree | e764260bea4210677e5d58ac257d89ac8c8d2183 /Makefile | |
| parent | 5192dab016025cf72fefab1f9b5d2a76dc6cf835 (diff) | |
| download | flashrom-bcd13bbb8576cb11e7283d3a7e5fb5227b40dca8.tar.gz | |
Intel NIC with parallel flash support.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Anton Kochkov <anton.kochkov@gmail.com>
Acked-by: Anton Kochkov <anton.kochkov@gmail.com>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1297 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 9 |
1 files changed, 9 insertions, 0 deletions
@@ -178,6 +178,9 @@ CONFIG_NICREALTEK ?= yes # Disable National Semiconductor NICs until support is complete and tested. CONFIG_NICNATSEMI ?= no +# Always enable Intel NICs for now. +CONFIG_NICINTEL ?= yes + # Always enable SPI on Intel NICs for now. CONFIG_NICINTEL_SPI ?= yes @@ -297,6 +300,12 @@ PROGRAMMER_OBJS += nicnatsemi.o NEED_PCI := yes endif +ifeq ($(CONFIG_NICINTEL), yes) +FEATURE_CFLAGS += -D'CONFIG_NICINTEL=1' +PROGRAMMER_OBJS += nicintel.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_NICINTEL_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_NICINTEL_SPI=1' PROGRAMMER_OBJS += nicintel_spi.o |