diff options
| author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2014-08-08 08:33:01 +0000 |
|---|---|---|
| committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2014-08-08 08:33:01 +0000 |
| commit | f69f0c63b93e60c9c3bfd2cb6f88544479ce2918 (patch) | |
| tree | 64ff1e62b06ee89492c914e11c86b54ddf126b0c /Makefile | |
| parent | a38e1e165c826e968ef144dcc74da6a3358097a6 (diff) | |
| download | flashrom-f69f0c63b93e60c9c3bfd2cb6f88544479ce2918.tar.gz | |
Unify non-shifted and shifted JEDEC access.
Some Parallel bus chips have a 16-bit mode and an 8-bit mode. They use
normal JEDEC addresses for 16-bit mode and shifted addresses (by 1 bit)
for 8-bit mode. Some programmers can access them in 16-bit mode, but on
all flashrom-supported programmers so far, we access them in 8-bit mode.
This means we have to shift the addresses but apart from the addresses
we can share the code.
This patch makes this possible by checking the chip's FEATURE_ADDR_SHIFTED
flag in common JEDEC functions and applying the right addresses respectively.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1840 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -351,7 +351,7 @@ endif # Flash chip drivers and bus support infrastructure. CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ - sst28sf040.o m29f400bt.o 82802ab.o \ + sst28sf040.o 82802ab.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ opaque.o sfdp.o en29lv640b.o at45db.o |