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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-11-10 15:25:18 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-11-10 15:25:18 +0000
commita6c15fe298f386a179a515170ab3e3787a7501b0 (patch)
treeb219ae51fc082062a2a0dd28a5a65c4559bc166e /atahpt.c
parent96c39ac714f6a7ed29f3b6c487ef549567a1e29e (diff)
downloadflashrom-a6c15fe298f386a179a515170ab3e3787a7501b0.tar.gz
Revert PCI config space writes on shutdown.
This means all chipset enables etc. will be undone on shutdown. Reversible PCI config space writes now use rpci_write_*(). PCI config space writes which are one-shot (e.g. communication via config space) should continue to use the permanent pci_write_* variants. Extend the number of available register_shutdown slots to 32. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'atahpt.c')
-rw-r--r--atahpt.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/atahpt.c b/atahpt.c
index 2552697..eac056e 100644
--- a/atahpt.c
+++ b/atahpt.c
@@ -50,7 +50,7 @@ int atahpt_init(void)
/* Enable flash access. */
reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS);
reg32 |= (1 << 24);
- pci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32);
+ rpci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32);
buses_supported = CHIP_BUSTYPE_PARALLEL;
@@ -59,13 +59,7 @@ int atahpt_init(void)
int atahpt_shutdown(void)
{
- uint32_t reg32;
-
- /* Disable flash access again. */
- reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS);
- reg32 &= ~(1 << 24);
- pci_write_long(pcidev_dev, REG_FLASH_ACCESS, reg32);
-
+ /* Flash access is disabled automatically by PCI restore. */
pci_cleanup(pacc);
release_io_perms();
return 0;