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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2011-11-09 23:40:00 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2011-11-09 23:40:00 +0000
commit8d6093845b3a37b5a4465235d243fa04747f7323 (patch)
tree5e023363074cbe351bc6ded9f20c3f116e6c6f1c /board_enable.c
parent3dd854d6160414325faa041ccc023f23abaedd39 (diff)
downloadflashrom-8d6093845b3a37b5a4465235d243fa04747f7323.tar.gz
Register Parallel/LPC/FWH programmers the same way SPI programmers are registered.
All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-By: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'board_enable.c')
-rw-r--r--board_enable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board_enable.c b/board_enable.c
index fe2f021..1824fa0 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -425,7 +425,7 @@ int it8705f_write_enable(uint8_t port)
/* Check if at least one flash segment is enabled. */
if (tmp & 0xf0) {
/* The IT8705F will respond to LPC cycles and translate them. */
- buses_supported = BUS_PARALLEL;
+ internal_buses_supported = BUS_PARALLEL;
/* Flash ROM I/F Writes Enable */
tmp |= 0x04;
msg_pdbg("Enabling IT8705F flash ROM interface write.\n");