diff options
author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-07-25 20:38:52 +0000 |
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committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-07-25 20:38:52 +0000 |
commit | df5794fd1018948f5872e3f1704c296cf274967c (patch) | |
tree | 5ff0e8e70159b87f162eac1332696c00ae8b4d27 /board_enable.c | |
parent | 98f8f86d76f6b9efa3ebb2fbfaa77e0c5455591e (diff) | |
download | flashrom-df5794fd1018948f5872e3f1704c296cf274967c.tar.gz |
add a bunch of new/tested stuff and various small changes 5
- mark EN25F80 as fully tested
http://www.flashrom.org/pipermail/flashrom/2011-July/007329.html
- mark W25Q16 as fully tested
http://www.flashrom.org/pipermail/flashrom/2011-July/007151.html
- mark W39V040A as fully tested
http://www.flashrom.org/pipermail/flashrom/2011-July/007161.html
- mark Pm25LV040 as fully tested
reported by TL1 on IRC
- mark W49F002U/N as fully tested
http://paste.flashrom.org/view.php?id=733g
- mark W39V080FA as fully tested
http://www.flashrom.org/pipermail/flashrom/2011-July/007225.html
- add ASUS P4S533-X to the list of supported boards
http://www.flashrom.org/pipermail/flashrom/2011-July/007200.html
- add ASUS M4A785TD-V EVO to the list of supported boards
http://www.flashrom.org/pipermail/flashrom/2011-July/007329.html
- add GA-945PL-S3P (rev. 6.6) to the list of supported boards
reported by TL1 on IRC
- add MS-7142 (K8MM-V) to the list of supported boards
http://www.flashrom.org/pipermail/flashrom/2011-July/007161.html
- add MS-7369 (K9N Neo V2) to the list of supported boards
http://www.flashrom.org/pipermail/flashrom/2011-July/007181.html
- add X7DBT-INF to the list of supported boards
http://www.flashrom.org/pipermail/flashrom/2011-July/007225.html
- mark SiS 645DX chipset enable as OK
http://www.flashrom.org/pipermail/flashrom/2011-July/007200.html
- mark SiS 651 chipset enable as OK
http://paste.flashrom.org/view.php?id=733
- move intel_ich_gpio34_raise to the correct line(s)
- change the output of unlock_w39_fwh_block from 0x%x to 0x%08x
- fix output for untested chipset enables (missing space)
- reorder the board enable in print.c entry for GA-8SIMLH added in r1385.
- minor other fixes
- fix output for multiple found flash chips by adding quotes and commas
- similarly fix output of "Found/Assuming" chips
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
the last two points are
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
everything else is
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'board_enable.c')
-rw-r--r-- | board_enable.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/board_enable.c b/board_enable.c index f83c765..35fdf07 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1475,15 +1475,6 @@ static int intel_ich_gpio18_raise(void) /* * Suited for: - * - ASUS A8Jm (laptop): Intel 945 + ICH7 - */ -static int intel_ich_gpio34_raise(void) -{ - return intel_ich_gpio_set(34, 1); -} - -/* - * Suited for: * - MSI MS-7046: LGA775 + 915P + ICH6 */ static int intel_ich_gpio19_raise(void) @@ -1521,6 +1512,15 @@ static int intel_ich_gpio22_raise(void) /* * Suited for: + * - ASUS A8Jm (laptop): Intel 945 + ICH7 + */ +static int intel_ich_gpio34_raise(void) +{ + return intel_ich_gpio_set(34, 1); +} + +/* + * Suited for: * - ASUS M6Ne (laptop): socket 479M (guessed) + Intel 855PM + ICH4-M */ static int intel_ich_gpio43_raise(void) @@ -2035,8 +2035,8 @@ const struct board_pciid_enable board_pciid_enables[] = { {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, P3, "GIGABYTE", "GA-7ZM", 512, OK, NULL}, {0x8086, 0x2570, 0x1458, 0x2570, 0x8086, 0x24d0, 0, 0, "^8IP775/-G$",NULL, NULL, P3, "GIGABYTE", "GA-8IP775", 0, OK, intel_ich_gpio32_raise}, {0x8086, 0x244b, 0x8086, 0x2442, 0x8086, 0x2445, 0x1458, 0xa002, NULL, NULL, NULL, P3, "GIGABYTE", "GA-8IRML", 0, OK, intel_ich_gpio25_raise}, - {0x1039, 0x0651, 0x1039, 0x0651, 0x1039, 0x7002, 0x1458, 0x5004, "^GA-8SIMLH$",NULL, NULL, P3, "GIGABYTE", "GA-8SIMLH", 0, OK, sis_gpio0_raise_and_w836xx_memw}, {0x8086, 0x24c3, 0x1458, 0x24c2, 0x8086, 0x24cd, 0x1458, 0x5004, NULL, NULL, NULL, P3, "GIGABYTE", "GA-8PE667 Ultra 2", 0, OK, intel_ich_gpio32_raise}, + {0x1039, 0x0651, 0x1039, 0x0651, 0x1039, 0x7002, 0x1458, 0x5004, "^GA-8SIMLH$",NULL, NULL, P3, "GIGABYTE", "GA-8SIMLH", 0, OK, sis_gpio0_raise_and_w836xx_memw}, {0x10DE, 0x02F1, 0x1458, 0x5000, 0x10DE, 0x0261, 0x1458, 0x5001, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8N51GMF", 0, OK, nvidia_mcp_gpio3b_raise}, {0x10DE, 0x026C, 0x1458, 0xA102, 0x10DE, 0x0260, 0x1458, 0x5001, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8N51GMF-9", 0, OK, nvidia_mcp_gpio3b_raise}, {0x10de, 0x00e4, 0x1458, 0x0c11, 0x10de, 0x00e0, 0x1458, 0x0c11, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8NS Pro-939", 0, NT, nvidia_mcp_gpio0a_raise}, |