diff options
author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-09-21 12:52:50 +0000 |
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committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-09-21 12:52:50 +0000 |
commit | bc56813e8ea13771088c6ba443e5063be1ee6276 (patch) | |
tree | 8e37e169514dfba6083cc6f8c18943e69b81e9a4 /chipdrivers.h | |
parent | f6ca415998f44aaafc49560aea602c3e8ad10d17 (diff) | |
download | flashrom-bc56813e8ea13771088c6ba443e5063be1ee6276.tar.gz |
Add a bunch of new/tested stuff and various small changes 14.
Tested Mainboards:
OK:
- ASUS M3A78-EH
http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html
- ASUS P2B-LS
http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html
- Biostar TA790GX A3+
http://paste.flashrom.org/view.php?id=1350
- ECS 848P-A7
http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html
- GIGABYTE GA-G41MT-S2PT
Reported on IRC
- GIGABYTE GA-H77-D3H
Reported and tested by Alexander Gordeev on IRC.
- Gigabyte GA-X79-UD5
http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html
- Shuttle FN78S
http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html
- VIA EITX-3000
Reported on IRC by Tuju
NOT OK:
- Dell PowerEdge C6220 (0HYFFG)
http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html
- Foxconn Q45M
http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html
- MSI MS-7309 (K9N6SGM-V)
http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html
- Supermicro X9QRi-F+
http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html
- ZOTAC H61-ITX WiFi (H61ITX-A-E)
http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html
ASUS CUSL2-C has been tested to be working with the board enable once
implemented for the TUSL2-C board. They seem to have the same PCI IDs
as shown in the links below. Since only the CUSL2-C board enable has been
tested yet, we distinguish the two by DMI strings.
http://paste.flashrom.org/view.php?id=1393
http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml
Tested flash chips:
- Set EMST F25L008A to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html
- Set GigaDevice GD25Q64 to PREW (+PREW)
http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea
- Set Macronix MX25L12805 to P (+P)
http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html
- Set SST SST49LF003A/B to PREW (+EW)
http://paste.flashrom.org/view.php?id=467
- Set Winbond W49V002FA to PREW (+EW)
http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html
Tested chipsets:
- Intel X79 (0x1d41)
http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html
Board enables:
- add ASUS P4P800-X
Created by Idwer Vollering and tested by Mingsen Bao:
http://paste.flashrom.org/view.php?id=467
- add DMI string to P4P800-VM
Miscellaneous:
- Add remaining Intel 7 series chipset (LPC) PCI IDs
- Add generic SPI detection for chips from Winbond
- Minor manpage changes
- Minor other cleanups
- Escape full stops after abbreviations in the manpage.
- Add ICH9 and successors to spi_get_valid_read_addr
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'chipdrivers.h')
-rw-r--r-- | chipdrivers.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/chipdrivers.h b/chipdrivers.h index b8af62a..ea6c35f 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -27,7 +27,12 @@ #include "flash.h" /* for chipaddr and flashctx */ -/* spi.c, should probably be in spi_chip.c */ +/* spi.c */ +int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); +int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); + +/* spi25.c */ int probe_spi_rdid(struct flashctx *flash); int probe_spi_rdid4(struct flashctx *flash); int probe_spi_rems(struct flashctx *flash); @@ -44,8 +49,6 @@ int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); uint8_t spi_read_status_register(struct flashctx *flash); int spi_write_status_register(struct flashctx *flash, int status); void spi_prettyprint_status_register_bit(uint8_t status, int bit); @@ -58,7 +61,6 @@ int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); -int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); /* sfdp.c */ int probe_spi_sfdp(struct flashctx *flash); |