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authorstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2014-08-20 15:39:19 +0000
committerstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2014-08-20 15:39:19 +0000
commitea550f88c18554adb2ce21fb7bca18872504ec8b (patch)
tree06741544f702c84fa5fcbc5edb8a888530917481 /chipset_enable.c
parentda4ea5715bdd6b98379ef9ff0b632c3a20854c48 (diff)
downloadflashrom-ea550f88c18554adb2ce21fb7bca18872504ec8b.tar.gz
Refine Flash Component descriptor handling.
Possible values as well as encodings have changed in newer chipsets as follows. - Pre-PCH (i.e. ICH) chipsets had a maximum frequency of 33 MHz for all operations - Since Cougar Point the chipsets support dual output fast reads (encoded in bit 30). - Flash component density encoding has changed from 3 to 4 bits with Lynx Point, currently allowing for up to 64 MB chips. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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