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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-09-15 00:17:37 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-09-15 00:17:37 +0000
commitc8310e06a8cc1f634e17e060f375444d0fd71b46 (patch)
treea6e81bc8cf557252479496bc3a655c1981b6303e /cli_classic.c
parent2eb79e9e5022506b6b7478520a6fcc60d9d84454 (diff)
downloadflashrom-c8310e06a8cc1f634e17e060f375444d0fd71b46.tar.gz
SPI bitbanging: request/release bus.
SPI bitbanging on devices which speak SPI natively has a dual-use problem: We need to shut down normal SPI operations to do the bitbanging ourselves. Once we're done, it makes a lot of sense to reenable "normal" SPI operations again. Add request_bus/release_bus functions to struct bitbang_spi_master. Add a bitbang shutdown function (not used yet). Change MCP SPI and Intel NIC SPI to use the new request/release bus infrastructure. Cosmetic changes to a few error messages (80 column limit). There are multiple possible strategies for bus request/release: - Request at the start of a SPI command, release immediately afterwards. - Request at the start of a SPI multicommand, release once all commands of the multicommand are done. - Request on programmer init, release on shutdown. Each strategy has its own advantages. For now, we will stay with the first strategy which worked fine so far. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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