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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-14 16:19:05 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-14 16:19:05 +0000
commit395dd1d1e2d37d90416e6d296a5f1f79bb320842 (patch)
treea9049f708d0ab7d42d122fecd23855aaa819c5bc /dummyflasher.c
parente8db2112db803b2c94a9fb55b136ebebda08c1ce (diff)
downloadflashrom-395dd1d1e2d37d90416e6d296a5f1f79bb320842.tar.gz
Convert SPI chips to partial write, but wrap the write functions in a
compat layer to allow converting the rest of flashrom later. I actually have patches for most of the remaining conversion, but I wanted to get this out and reviewed first. Tested on Intel NM10 by David Hendricks. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'dummyflasher.c')
-rw-r--r--dummyflasher.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/dummyflasher.c b/dummyflasher.c
index 5f88fc4..479a938 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -167,3 +167,12 @@ int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
return spi_read_chunked(flash, buf, start, len, 64 * 1024);
}
+/* Is is impossible to trigger this code path because dummyflasher probing will
+ * never be successful, and the current frontend refuses to write in that case.
+ * Other frontends may allow writing even for non-detected chips, though.
+ */
+int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len)
+{
+ spi_disable_blockprotect();
+ return spi_write_chunked(flash, buf, start, len, 256);
+}