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authorstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2012-02-15 23:40:23 +0000
committerstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2012-02-15 23:40:23 +0000
commit5e0e849a58ff43a6121848e3e850becdf6eca707 (patch)
treeb762698047deda76ed7e16c43552c3b388bc3e48 /flash.h
parent8e8bfa29c1fa3cb318bf893beaa62ac84b38c814 (diff)
downloadflashrom-5e0e849a58ff43a6121848e3e850becdf6eca707.tar.gz
Warn of one-time programmable (OTP) memory
Some flash chips contain OTP memory that we cannot read or write (yet). This prohibits us from cloning them, hence warn the user if we detect it. Not all variations of the tagged chips contain OTP memory. They are often only enabled on request or have there own ordering numbers. There is usually no way to distinguish them. Because this is a supposedly seldomly used feature the warning is shown in with dbg verbosity. The manpage is extended to describe the backgrounds a bit. This patch is based on the idea and code of Daniel Lenski. Signed-off-by: Daniel Lenski <dlenski@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1493 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'flash.h')
-rw-r--r--flash.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/flash.h b/flash.h
index e51b6d4..20db343 100644
--- a/flash.h
+++ b/flash.h
@@ -83,6 +83,7 @@ enum chipbustype {
#define FEATURE_ADDR_SHIFTED (1 << 5)
#define FEATURE_WRSR_EWSR (1 << 6)
#define FEATURE_WRSR_WREN (1 << 7)
+#define FEATURE_OTP (1 << 8)
#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
struct flashctx;