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author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2008-01-19 00:04:46 +0000 |
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committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2008-01-19 00:04:46 +0000 |
commit | deaaee5d6d95cb9ece04a82ca945e74406ad51bc (patch) | |
tree | 2f1bd36d392569740f39ed531de721c2eb54661c /flash.h | |
parent | 8b7f1a7d04d74121ae445efcb4f00a08c7c11a6d (diff) | |
download | flashrom-deaaee5d6d95cb9ece04a82ca945e74406ad51bc.tar.gz |
Original v2 revision: 3061
Support SPI flash chips bigger than 512 kByte sitting behind IT8716F
Super I/O performing LPC-to-SPI flash translation.
Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'flash.h')
-rw-r--r-- | flash.h | 10 |
1 files changed, 10 insertions, 0 deletions
@@ -234,7 +234,16 @@ extern struct flashchip flashchips[]; #define TI_ID 0x97 /* Texas Instruments */ +/* + * W25X chips are SPI, first byte of device ID is memory type, second + * byte of device ID is related to log(bitsize). + */ #define WINBOND_ID 0xDA /* Winbond */ +#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */ +#define W_25X10 0x3011 +#define W_25X20 0x3012 +#define W_25X40 0x3013 +#define W_25X80 0x3014 #define W_29C011 0xC1 #define W_29C020C 0x45 #define W_29C040P 0x46 @@ -297,6 +306,7 @@ void generic_spi_write_enable(); void generic_spi_write_disable(); int generic_spi_chip_erase_c7(struct flashchip *flash); int generic_spi_chip_write(struct flashchip *flash, uint8_t *buf); +int generic_spi_chip_read(struct flashchip *flash, uint8_t *buf); /* 82802ab.c */ int probe_82802ab(struct flashchip *flash); |