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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-22 15:20:43 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-22 15:20:43 +0000
commit0adc9d29a81c15e7acef494f2d78ad55f3206d43 (patch)
tree531046a4f65cf5c8ee96350b9e71d0223c95279c /flashchips.c
parentec96f7a90d37ba07d39b90b5b41b9acbaec4d1d6 (diff)
downloadflashrom-0adc9d29a81c15e7acef494f2d78ad55f3206d43.tar.gz
Add support for the Intel 28F002BC-T.
Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index 902f956..c6d265e 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -2814,6 +2814,33 @@ struct flashchip flashchips[] = {
{
.vendor = "Intel",
+ .name = "28F002BC-T",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = INTEL_ID,
+ .model_id = P28F002BC,
+ .total_size = 256,
+ .page_size = 256 * 1024,
+ .tested = TEST_UNTESTED,
+ .probe = probe_82802ab,
+ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {128 * 1024, 1},
+ {96 * 1024, 1},
+ {8 * 1024, 2},
+ {16 * 1024, 1},
+ },
+ .block_erase = erase_block_82802ab,
+ },
+ },
+ .write = write_82802ab,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "Intel",
.name = "28F004S5",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = INTEL_ID,