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| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-07-14 16:19:05 +0000 |
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| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-07-14 16:19:05 +0000 |
| commit | 395dd1d1e2d37d90416e6d296a5f1f79bb320842 (patch) | |
| tree | a9049f708d0ab7d42d122fecd23855aaa819c5bc /flashchips.c | |
| parent | e8db2112db803b2c94a9fb55b136ebebda08c1ce (diff) | |
| download | flashrom-395dd1d1e2d37d90416e6d296a5f1f79bb320842.tar.gz | |
Convert SPI chips to partial write, but wrap the write functions in a
compat layer to allow converting the rest of flashrom later.
I actually have patches for most of the remaining conversion, but I
wanted to get this out and reviewed first.
Tested on Intel NM10 by David Hendricks.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'flashchips.c')
| -rw-r--r-- | flashchips.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c index 32caee0..5954eb2 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1423,7 +1423,7 @@ struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .write = spi_aai_write, + .write = spi_chip_write_1, .read = spi_chip_read, }, |