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authorstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2014-05-07 15:25:04 +0000
committerstefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2014-05-07 15:25:04 +0000
commitf1a4104ff54e81330a43e1264f5aaeba015c714e (patch)
tree044d2d50e1aef71752b519a87fa8f25a5482da4f /flashchips.c
parent5f57ff6d47909d43d961c64476ba43a25f35992f (diff)
downloadflashrom-f1a4104ff54e81330a43e1264f5aaeba015c714e.tar.gz
Add support for SST25LF020A.
Tested on hardware by Idwer too. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index ede5dc2..8059374 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -9614,6 +9614,38 @@ const struct flashchip flashchips[] = {
{
.vendor = "SST",
+ .name = "SST25LF020A",
+ .bustype = BUS_SPI,
+ .manufacture_id = SST_ID,
+ .model_id = SST_SST25VF020_REMS,
+ .total_size = 256,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_EWSR,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rems,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 64} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 8} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ },
+ },
+ .printlock = spi_prettyprint_status_register_sst25, /* FIXME: No BP2 & 3 */
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */
+ .read = spi_chip_read, /* Fast read (0x0B) supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
+ .vendor = "SST",
.name = "SST25LF040A",
.bustype = BUS_SPI,
.manufacture_id = SST_ID,