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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-17 22:42:33 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-17 22:42:33 +0000
commit117597c94ca5a46a33e2fdaf3b0866241ba7da88 (patch)
treefd28100f4a2dfcf557dfbe62854a4fc0a0a47883 /gfxnvidia.c
parent8122eccff19a812964afbe4ed81176899e5b2f0d (diff)
downloadflashrom-117597c94ca5a46a33e2fdaf3b0866241ba7da88.tar.gz
Use the BAR value returned by pcidev_init which automatically applies
the correct BAR mask for the drkaiser driver. Truncate flash chip addresses to fit into the 128 kB memory window for drkaiser and pick the same window size for gfxnvidia. Uwe tested all operations successfully on a Dr. Kaiser card. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'gfxnvidia.c')
-rw-r--r--gfxnvidia.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/gfxnvidia.c b/gfxnvidia.c
index 962ba1a..29e2910 100644
--- a/gfxnvidia.c
+++ b/gfxnvidia.c
@@ -25,6 +25,11 @@
#define PCI_VENDOR_ID_NVIDIA 0x10de
+/* Mask to restrict flash accesses to a 128kB memory window.
+ * FIXME: Is this size a one-fits-all or card dependent?
+ */
+#define GFXNVIDIA_MEMMAP_MASK ((1 << 17) - 1)
+
uint8_t *nvidia_bar;
const struct pcidev_status gfx_nvidia[] = {
@@ -95,10 +100,10 @@ int gfxnvidia_shutdown(void)
void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr)
{
- mmio_writeb(val, nvidia_bar + addr);
+ mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK));
}
uint8_t gfxnvidia_chip_readb(const chipaddr addr)
{
- return mmio_readb(nvidia_bar + addr);
+ return mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK));
}