diff options
| author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-07-01 00:39:23 +0000 |
|---|---|---|
| committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-07-01 00:39:23 +0000 |
| commit | a97ddd07208825a7331155fe8aced7025c981872 (patch) | |
| tree | eadb869d47a90613588c3d42d4344854622f34f4 /ichspi.c | |
| parent | 39efd7d3aa4133f605a11ab92a3acdad260697a3 (diff) | |
| download | flashrom-a97ddd07208825a7331155fe8aced7025c981872.tar.gz | |
ichspi.c: preserve reserved bits in address registers
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1362 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'ichspi.c')
| -rw-r--r-- | ichspi.c | 13 |
1 files changed, 8 insertions, 5 deletions
@@ -659,10 +659,11 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset, return 1; } - /* Programm Offset in Flash into FADDR */ - REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ + /* Program offset in flash into SPIA while preserving reserved bits. */ + temp32 = REGREAD32(ICH7_REG_SPIA) & ~0x00FFFFFF; + REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF) | temp32); - /* Program data into FDATA0 to N */ + /* Program data into SPID0 to N */ if (write_cmd && (datalength != 0)) { temp32 = 0; for (a = 0; a < datalength; a++) { @@ -803,8 +804,10 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, return 1; } - /* Programm Offset in Flash into FADDR */ - REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ + /* Program offset in flash into FADDR while preserve the reserved bits + * and clearing the 25. address bit which is only useable in hwseq. */ + temp32 = REGREAD32(ICH9_REG_FADDR) & ~0x01FFFFFF; + REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF) | temp32); /* Program data into FDATA0 to N */ if (write_cmd && (datalength != 0)) { |