diff options
| author | uwe <uwe@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-03-25 23:18:41 +0000 |
|---|---|---|
| committer | uwe <uwe@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-03-25 23:18:41 +0000 |
| commit | cd9db428bb574940d458abad7a413b628c0e5166 (patch) | |
| tree | 7e311c929ef697a3781145bc2cea68359deb2794 /ichspi.c | |
| parent | b3733042fd9e6c5c747189394f153cb422acfd31 (diff) | |
| download | flashrom-cd9db428bb574940d458abad7a413b628c0e5166.tar.gz | |
Polish the flashrom code comments and outputs a bit.
- Fix a number of typos (found via ispell).
- Use correct vendor names (as per their websites) consistently.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'ichspi.c')
| -rw-r--r-- | ichspi.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -536,7 +536,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, /* clear error status registers */ temp32 |= (SSFS_CDS + SSFS_FCERR); - /* USE 20 MhZ */ + /* Use 20 MHz */ temp32 |= SSFC_SCF_20MHZ; if (datalength != 0) { |