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| author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-09-18 15:15:31 +0000 |
|---|---|---|
| committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-09-18 15:15:31 +0000 |
| commit | d3f5e740d3eac915de84de0d26b331d0108f7ccb (patch) | |
| tree | a01dcf9a4d5caf86935037d9286c9d8b3a8ffaf6 /ichspi.c | |
| parent | c259284579e9abc02edab8a42b2a5cb769122aab (diff) | |
| download | flashrom-d3f5e740d3eac915de84de0d26b331d0108f7ccb.tar.gz | |
ichspi: inform the user about the consequences of the security override strap
Ibex Peak SPI Programming Guide:
The PCH has a mechanism to set up to 5 address ranges from HOST access. These are
defined in PR0, PR1, PR2, PR3 and PR4 in the PCH EDS. These address ranges are NOT
unlocked by assertion of Flash descriptor Override.
Also, the datasheets mention the bit in their description of FRAP but not PR[N].
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1449 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'ichspi.c')
| -rw-r--r-- | ichspi.c | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -1325,6 +1325,12 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, } if (tmp2 & HSFS_FDV) ichspi_desc = 1; + if (!(tmp2 & HSFS_FDOPSS) && ichspi_desc) + msg_pinfo("The Flash Descriptor Security Override " + "Strap-Pin is set. Restrictions implied\n" + "by the FRAP and FREG registers are NOT in " + "effect. Please note that Protected\n" + "Range (PR) restrictions still apply.\n"); tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFC); msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2); |