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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2012-05-06 22:48:01 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2012-05-06 22:48:01 +0000
commit28671f4b9dd7abe1947826215bc4711087e71acd (patch)
tree57c496013e2629ec46ec4d35262cd5aefd0a2965 /internal.c
parent73f705d7813e1e6d02754f6fdb5ee310fd83a8a4 (diff)
downloadflashrom-28671f4b9dd7abe1947826215bc4711087e71acd.tar.gz
Add Winbond W836xx SuperI/O detection.
Add ITE IT8707F/IT8710F detection. Note that we autodetect those chips, but we don't handle their flash translation features automatically yet. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1533 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'internal.c')
-rw-r--r--internal.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/internal.c b/internal.c
index 479cbf7..5b24577 100644
--- a/internal.c
+++ b/internal.c
@@ -101,12 +101,14 @@ int force_boardmismatch = 0;
#if defined(__i386__) || defined(__x86_64__)
void probe_superio(void)
{
+ probe_superio_winbond();
+ /* ITE probe causes SMSC LPC47N217 to power off the serial UART.
+ * Always probe for SMSC first, and if a SMSC Super I/O is detected
+ * at a given I/O port, do _not_ probe that port with the ITE probe.
+ * This means SMSC probing must be done before ITE probing.
+ */
+ //probe_superio_smsc();
probe_superio_ite();
-#if 0
- /* Winbond Super I/O code is not yet available. */
- if (superio.vendor == SUPERIO_VENDOR_NONE)
- superio = probe_superio_winbond();
-#endif
}
int superio_count = 0;