Fix parallel-style programmer access from ITE IT87/Winbond W83627 SPI

The ITE IT87 SPI driver uses a trick to speed up reading and writing:
If a flash chip is 512 kByte or less, the flash chip can be completely
mapped in memory and both read and write accesses are faster that way.
The current IT87 SPI code did use the parallel programmer interface for
memory mapped reads and writes, but that's the wrong abstraction. It has
been fixed to use mmio_read*/mmio_write* for that purpose.

The Winbond W83627 SPI driver uses the same trick in its read path for
all supported chip sizes. Fix it the same way.

Switch internal_chip_readn to use mmio_readn as proper abstraction.

Kudos to Michael Karcher for spotting the bugs.

Reported-by: Johan Svensson <flashrom.js@crypt.se>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Tested-by: Johan Svensson <flashrom.js@crypt.se>


git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 1 insertions, 1 deletions

diff --git a/internal.c b/internal.c
index 5716e64..479cbf7 100644
--- a/internal.c
+++ b/internal.c
@@ -387,6 +387,6 @@ static uint32_t internal_chip_readl(const struct flashctx *flash,
 static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
 				const chipaddr addr, size_t len)
 {
-	memcpy(buf, (void *)addr, len);
+	mmio_readn((void *)addr, buf, len);
 	return;
 }