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| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-06-16 08:55:44 +0000 |
|---|---|---|
| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-06-16 08:55:44 +0000 |
| commit | 36a4bafe1fcccdf2695ece4844e843a33f719478 (patch) | |
| tree | 29b0a806979474c3d8dcbc6acfa7022728ca4a15 /it87spi.c | |
| parent | e54a1e5978900499b189780d870c547f51cd0534 (diff) | |
| download | flashrom-36a4bafe1fcccdf2695ece4844e843a33f719478.tar.gz | |
This patch gives us arbitrary range reads at byte boundaries for every
single chip supported by flashrom.
That means you can tell flashrom to read exactly bytes 12345-56789
(start 12345, length 44445) and it will not fetch a single byte more.
Uwe tested this on one LPC, one SPI, and one parallel flash board.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'it87spi.c')
| -rw-r--r-- | it87spi.c | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -257,15 +257,15 @@ int it8716f_spi_chip_write_1(struct flashchip *flash, uint8_t *buf) * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles * Need to read this big flash using firmware cycles 3 byte at a time. */ -int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf) +int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) { int total_size = 1024 * flash->total_size; fast_spi = 0; if ((programmer == PROGRAMMER_IT87SPI) || (total_size > 512 * 1024)) { - spi_read_chunked(flash, buf, 3); + spi_read_chunked(flash, buf, start, len, 3); } else { - read_memmapped(flash, buf); + read_memmapped(flash, buf, start, len); } return 0; |