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author | mkarcher <mkarcher@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-05-11 17:07:07 +0000 |
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committer | mkarcher <mkarcher@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-05-11 17:07:07 +0000 |
commit | 5de0d1e9392bde4665ddb6cd216400e832b8178c (patch) | |
tree | 8b556f82073e824bc1e9a4cc9547d67b1d902cee /it87spi.c | |
parent | b23440053e8b3f8fcd0e97f0dbdfb84bed0bbc5f (diff) | |
download | flashrom-5de0d1e9392bde4665ddb6cd216400e832b8178c.tar.gz |
kill central list of SPI programmers
Remove the array spi_programmer, replace it by dynamic registration
instead. Also initially start with no busses supported, and switch to
the default non-SPI only for the internal programmer.
Also this patch changes the initialization for the buses_supported variable
from "everything-except-SPI" to "nothing". All programmers have to set the
bus type on their own, and this enables register_spi_programmer to just add
the SPI both for on-board SPI interfaces (where the internal programmer
already detected the other bus types), as well as for external programmers
(where we have the default "none").
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'it87spi.c')
-rw-r--r-- | it87spi.c | 24 |
1 files changed, 19 insertions, 5 deletions
@@ -104,6 +104,21 @@ void probe_superio_ite(void) return; } +static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr); +static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); +static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); + +static const struct spi_programmer spi_programmer_it87xx = { + .type = SPI_CONTROLLER_IT87XX, + .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_write = MAX_DATA_UNSPECIFIED, + .command = it8716f_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = it8716f_spi_chip_read, + .write_256 = it8716f_spi_chip_write_256, +}; + static uint16_t it87spi_probe(uint16_t port) { uint8_t tmp = 0; @@ -180,9 +195,8 @@ static uint16_t it87spi_probe(uint16_t port) it8716f_flashport = flashport; if (buses_supported & CHIP_BUSTYPE_SPI) msg_pdbg("Overriding chipset SPI with IT87 SPI.\n"); - spi_controller = SPI_CONTROLLER_IT87XX; /* FIXME: Add the SPI bus or replace the other buses with it? */ - buses_supported |= CHIP_BUSTYPE_SPI; + register_spi_programmer(&spi_programmer_it87xx); return 0; } @@ -234,7 +248,7 @@ int init_superio_ite(void) * commands with the address in inverse wire order. That's why the register * ordering in case 4 and 5 may seem strange. */ -int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, +static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { uint8_t busy, writeenc; @@ -327,7 +341,7 @@ static int it8716f_spi_page_program(struct flashchip *flash, uint8_t *buf, int s * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles * Need to read this big flash using firmware cycles 3 byte at a time. */ -int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) +static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) { fast_spi = 0; @@ -344,7 +358,7 @@ int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int return 0; } -int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) +static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { /* * IT8716F only allows maximum of 512 kb SPI chip size for memory |