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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-03-30 02:45:18 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-03-30 02:45:18 +0000
commit6387b0405ad58d4f7a598cbc59ea9a20bad75f67 (patch)
treea91d660a8a82f1bb26f28d34bb951003d0284a25 /it87spi.c
parentcd2da55d97d0024577db62e38a6e6acd87c055c0 (diff)
downloadflashrom-6387b0405ad58d4f7a598cbc59ea9a20bad75f67.tar.gz
Add ITE IT8720 SPI support.
Original patch by Vadim Girlin. Message printing updated by Carl-Daniel Hailfinger. Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'it87spi.c')
-rw-r--r--it87spi.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/it87spi.c b/it87spi.c
index 11087dd..0ee7d12 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -103,6 +103,7 @@ static uint16_t find_ite_spi_flash_port(uint16_t port, uint16_t id)
switch (id) {
case 0x8716:
case 0x8718:
+ case 0x8720:
enter_conf_mode_ite(port);
/* NOLDN, reg 0x24, mask out lowest bit (suspend) */
tmp = sio_read(port, 0x24) & 0xFE;
@@ -159,7 +160,7 @@ static uint16_t find_ite_spi_flash_port(uint16_t port, uint16_t id)
break;
/* TODO: Handle more IT87xx if they support flash translation */
default:
- msg_pinfo("SuperI/O ID %04hx is not on the controller list.\n", id);
+ msg_pdbg("SuperI/O ID %04hx is not on the controller list.\n", id);
}
return flashport;
}
@@ -199,8 +200,11 @@ int it87xx_probe_spi_flash(const char *name)
int ret;
ret = it87spi_common_init();
- if (!ret)
+ if (!ret) {
+ if (buses_supported & CHIP_BUSTYPE_SPI)
+ msg_pdbg("Overriding chipset SPI with IT87 SPI.\n");
buses_supported |= CHIP_BUSTYPE_SPI;
+ }
return ret;
}