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| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-05-09 02:09:45 +0000 |
|---|---|---|
| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-05-09 02:09:45 +0000 |
| commit | 73cf3df4999eddd433c1d8dfd1da500afab96721 (patch) | |
| tree | 9bd6460e4a69d0647706ab139184870b32244441 /it87spi.c | |
| parent | ab8d21b08b8b58d8a136a75b912f1d677287efe2 (diff) | |
| download | flashrom-73cf3df4999eddd433c1d8dfd1da500afab96721.tar.gz | |
Until the ICH SPI driver can handle preopcodes as standalone opcodes, we
should handle such special opcode failure gracefully on ICH and
compatible chipsets.
This fixes chip erase on almost all ICH+VIA SPI masters.
Thanks to Ali Nadalizadeh for helping track down this bug!
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@484 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'it87spi.c')
| -rw-r--r-- | it87spi.c | 13 |
1 files changed, 10 insertions, 3 deletions
@@ -196,11 +196,14 @@ int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, } /* Page size is usually 256 bytes */ -static void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) +static int it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) { int i; + int result; - spi_write_enable(); + result = spi_write_enable(); + if (result) + return result; OUTB(0x06, it8716f_flashport + 1); OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); for (i = 0; i < 256; i++) { @@ -212,6 +215,7 @@ static void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) usleep(1000); + return 0; } /* @@ -222,12 +226,15 @@ int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf) { int total_size = 1024 * flash->total_size; int i; + int result; fast_spi = 0; spi_disable_blockprotect(); for (i = 0; i < total_size; i++) { - spi_write_enable(); + result = spi_write_enable(); + if (result) + return result; spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) myusec_delay(10); |