diff options
| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2008-05-16 00:19:52 +0000 |
|---|---|---|
| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2008-05-16 00:19:52 +0000 |
| commit | 9ec795b2b561def500d54f1d2a94e093b647661a (patch) | |
| tree | 18ba00652c0b471ee9e4d93c2ef132f35ca869cc /it87spi.c | |
| parent | 666dfc08c39f3f547a74186b3266694ea61672a5 (diff) | |
| download | flashrom-9ec795b2b561def500d54f1d2a94e093b647661a.tar.gz | |
Original v2 revision: 3324
Enable IT8716F LPC-to-SPI write cycle translation in flashrom if the
IT8716F decodes any address to the attached SPI ROM.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'it87spi.c')
| -rw-r--r-- | it87spi.c | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -93,6 +93,12 @@ static uint16_t find_ite_spi_flash_port(uint16_t port) 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis"); printf("LPC write to serial flash %sabled\n", (tmp & 1 << 4) ? "en" : "dis"); + /* If any serial flash segment is enabled, enable writing. */ + if ((tmp & 0xe) && (!(tmp & 1 << 4))) { + printf("Enabling LPC write to serial flash\n"); + tmp |= 1 << 4; + regwrite(port, 0x24, tmp); + } printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); /* LDN 0x7, reg 0x64/0x65 */ regwrite(port, 0x07, 0x7); |