diff options
| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-06-28 10:57:58 +0000 |
|---|---|---|
| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-06-28 10:57:58 +0000 |
| commit | c7c19fdb0d305a1e2746312bd9e5d391c151de58 (patch) | |
| tree | 953fc3ab094716868fe397d7a0ae0bb4052782cb /it87spi.c | |
| parent | c548a57b09d17353d054b1353a1aaa820511a1a1 (diff) | |
| download | flashrom-c7c19fdb0d305a1e2746312bd9e5d391c151de58.tar.gz | |
Handle programmer init errors and abort. If the programmer didn't
initialize correctly, it is pointless to continue.
Fix standalone IT87* SPI init to set flashbus to NONE if no IT87* SPI
communication is possible.
Print the I/O port detected by the IT87* SPI code.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'it87spi.c')
| -rw-r--r-- | it87spi.c | 8 |
1 files changed, 6 insertions, 2 deletions
@@ -83,11 +83,12 @@ static uint16_t find_ite_spi_flash_port(uint16_t port) tmp |= 1 << 4; sio_write(port, 0x24, tmp); } - printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); + printf("Serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29); /* LDN 0x7, reg 0x64/0x65 */ sio_write(port, 0x07, 0x7); flashport = sio_read(port, 0x64) << 8; flashport |= sio_read(port, 0x65); + printf("Serial flash port 0x%04x\n", flashport); } exit_conf_mode_ite(port); return flashport; @@ -113,8 +114,11 @@ int it87spi_init(void) get_io_perms(); ret = it87spi_common_init(); - if (!ret) + if (!ret) { buses_supported = CHIP_BUSTYPE_SPI; + } else { + buses_supported = CHIP_BUSTYPE_NONE; + } return ret; } |